Z8 Encore! XP® 4K Series
Product Specification
207
Table 127. eZ8 CPU Instruction Summary (Continued)
Address Mode
Flags
Assembly
Mnemonic
Opcode(s)
(Hex)
Fetch Instr.
H Cycles Cycles
Symbolic Operation
dst
r
src
r
C
Z
S
V
D
XOR dst, src
dst ← dst XOR src
B2
B3
B4
B5
B6
B7
B8
B9
–
*
*
0
–
–
2
2
3
3
3
3
4
4
3
4
3
4
3
4
3
3
r
Ir
R
R
R
IR
IM
IM
ER
IM
R
IR
ER
ER
XORX dst, src
Flags Notation:
dst ← dst XOR src
–
*
*
0
–
–
* = Value is a function of the result of the operation.
– = Unaffected
0 = Reset to 0
1 = Set to 1
X = Undefined
PS022815-0206
eZ8 CPU Instruction Set