Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
Port 2 (P27-P20). Port 2 is an 8-bit, bidirectional, CMOS-
compatible I/O port. These eight I/O lines can be config-
ured under software control as an input or output, indepen-
dently. All input buffers are Schmitt-triggered. Bits pro-
grammed as outputs can be globally programmed as
either push-pull or open-drain. Low EMI output buffers can
be globally programmed by the software. When used as an
I/O port, Port 2 can be placed under handshake control.
In Handshake Mode, Port 3 lines P31 and P36 are used as
handshake control lines. The handshake direction is deter-
mined by the configuration (input or output) assigned to bit
7 of Port 2 (Figure 20).
Port 2 (I/O)
Z86E40
MCU
Handshake Controls
/DAV2 and RDY2
(P31 and P36)
Open-Drain
OEN
PAD
Out
TTL Level Shifter
In
Auto Latch
R ≈ 500 KΩ
Figure 20. Port 2 Configuration
P R E L I M I N A R Y
28
DS97Z8X0500
ZILOG [ ZILOG, INC. ]
