ZNBG3113
ZNBG3114
The following schematic shows the function of the VPOL input. Only one of the two external FETs
numberd Q1 and Q2 are powered at any one time, their selection is controlled by the input VPOL
.
This input is designed to be wired to the power input of the LNB via a high value (10k) resistor.
With the input voltage of the LNB set at or below 14V, FET Q2 will be enabled. With the input
voltage at or above 15.5V, FET Q1 will be enabled. The disabled FET has its gate driven low and
its drain terminal is switched open circuit. It is permissible to connect the drain pins D1 and D2
together if required by the application circuit. FET number Q3 is always active regardless of the
voltage applied to VPOL
.
Control Input Switch Function
Input Sense Polarisation Select
Vertical
FET Q2
FET Q1
≤14 volts
Horizontal
≥ 15.5 volts
4-131
ZETEX [ ZETEX SEMICONDUCTORS ]
