MT8920B
ST-BUS Parallel Access Circuit
Data Sheet
Features
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High speed parallel access to the serial
ST-BUS
Parallel bus optimized for 68000
µP
(mode 1)
Fast dual-port RAM access (mode 2)
Access time: 120 nsec
Parallel bus controller (mode 3) - no external
controller required
Flexible interrupt capabilities - two
independent/programmable interrupt sources
with auto-vectoring
Selectable 24 and 32 channel operation
Programmable loop-around modes
Low power CMOS technology
Ordering Information
MT8920BE
28 Pin PDIP
MT8920BP
28 Pin PLCC
MT8920BS
28 Pin SOIC
MT8920BE1
28 Pin PDIP*
MT8920BP1
28 Pin PLCC*
MT8920BS1
28 Pin SOIC*
MT8920BPR1 28 Pin PLCC*
*PB Free Matte Tin
-40°C to 85°C
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tape & Reel
August 2005
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Description
The ST-BUS Parallel Access Circuit (STPA) provides
a simple interface between Zarlink’s ST-BUS and
parallel system environments.
Applications
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Parallel control/data access to T1/CEPT digital
trunk interfaces
Digital signal processor interface to ST-BUS
Computer to Digital PABX link
Voice store and forward systems
Interprocessor communications
D7-D0
A4-A0
Tx0
Dual Port Ram
32 X 8
Parallel-
to-serial
Converter
STo0
CS
DS, OE
R/W, WE
DTACK,
BUSY, DCS
IRQ, 24/32
IACK, MS1
A5, STCH
MMS
Parallel
Port
Interface
Interrupt
Registers
Control
Registers
Rx0
Dual Port Ram
32 X 8
Serial-to-
Parallel
Converter
STi0
Tx1
Dual Port Ram
32 X 8
Parallel-
to-Serial
Converter
Comp/
MUX
Address
Generator
STo1
F0i
C4i
V
SS
V
DD
Figure 1 - Functional Block Diagram
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2002-2005, Zarlink Semiconductor Inc. All Rights Reserved.
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ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
