MT88E43B
Data Sheet
First Ring Cycle
Ring Burst
Line Reversal
Mark
D
Ch. seizure
C
Data Packet
E
A/B Wires
B
F
A
Note 3
TRIGout
PWDN
Note 3
50-150ms
250-400ms
TE DC load
TE AC load
FSKen
CD
Note 1
Note 2
tCA
tCP
A = 200-450ms
B ≥ 500ms
DR
C = 80-262ms
D = 45-262ms
E ≤ 2.5s (typ. 500ms)
F >200ms
DCLK
DATA
..101010..
Data
tPD
tPU
Note: Parameter
from "CCA Exceptions
Document Issue 3"
F
OSCout
Figure 18 - Input and Output Timing for CCA Caller Display Service (CDS), e.g., CLIP
Notes:
1) TW/P&E/312 specifies that the AC and DC loads should be removed between 50 to 150 ms after the end of the FSK signal, indicated
by CD returning to high. The MT88E43 may also be powered down at this time.
2) FSKen should be set low when FSK is not expected to prevent the FSK demodulator from reacting to other in-band signals such as
speech, and DTMF tones.
3) TRIGout represents the ring envelope during ringing.
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Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
