Data sheet
MH89790B
are combined by an internal NAND gate to form a new
signal, which represents received data. The received data
is clocked into the chip on the falling edge of E2o. Figure
28 shows the functional timing of the bipolar receiver.
Input jitter tolerance of the MH89790B exceeds minimum
jitter tolerance as specified in CCITT I.431 and G.823 (see
Figure 13).
Input impedance seen by the transmission line is about 75
ohms, (transformer ratio 1:1:1 with center-tap grounded)
as required by G.703 for coaxial cable. Attenuation of the
transmission line shall not exceed 6dB (at 1024 kHz) and
attenuation characteristics shall be close to the “square
root of F”.
Bipolar Line Transmitter
The MH89790B provides two open collector drivers,
OUTA and OUTB. These outputs are suitable for driving
a center-tapped pulse transformer. Figure 29 illustrates
how the two outputs combine to create opposite polarities
of the AMI line code. Each output steers the transformer
into producing a pulse of the opposite polarity.
f
AF [dB] = AFref [dB] *
fref
where:
Clock Extractor
AF - attenuation at frequency f in dB
The MH89790B contains a clock extraction circuit that
generates the E2o clock from the received data. This clock
is used to latch received data. The falling edge of E2o is
approximately aligned with the center of the received data
pulse. Alignment between these signals can be disrupted
by jitter and wander on the received signal. Maximum
tolerance of the MH89790B to the input jitter is shown in
Figure 13 relative to minimum jitter tolerance specified in
G.823 and I.431.
AFref - attenuation at frequency fref in dB (in this
case 6 dB)
fref
-
reference frequency (in this case 1024
kHz)
f -
frequency in kHz
out of
synchronization
No
search for frame
alignment
signal
Yes
No
verify bit 2 of non-
frame alignment
signal
# of consecutive incorrect
frame alignment signals = 3
Yes
No
verify second
occurrence of frame
alignment signal
time out > 8ms
Yes
frame synchroni-
zation acquired
No
find two CRC
search for
frame alignment
multiframe align-
ment signal
number of CRC
errors > 914/s
signals
Yes
Yes
multiframe synchro-
nization acquired
CRC synchronization
acquired
Yes
check for two errored
multiframe alignment
signals
- - - - - Only if the
maintenance
option is
No
selected
Figure 12 - Synchronization State Diagram
Zarlink Semiconductor Inc.
15
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
