Data Sheet
MGCM02
MGCM02 Power Control
RTC, TTC
Mode
MGCM02 features flexible power control using the
PCS<2:0> Word 7 - Bits 17:15 using the serial bus in
conjunction with the PCA pin.
0
1
Normal
Tristate
Lock Detect Output Polarity
PCS <3:0>
Mode
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
Deep Sleep
Standby
The Lock detect output polarity can be inverted using
RLI, TLI - Word3 Bits 18,19. In normal operation lock
detect outputs are high when locked.
TX
RLI, TLI
Mode
RX
0
1
Normal
Invert
Duplex
Alt Rx/Tx
RSSI On
RSSI Off
TX PLL ON
TX PLL OFF
RX PLL ON
RX PLL OFF
Lock Detect Output Control
The receive or transmit lock detect output can be
selected for gating with the UHF lock detect input
using the LDC bit - Word 5 Bit 5. The gating for the
total lock detect function is shown below. The RLI
and TLI bits should be set to 0. The combined lock
detect output is available on Pin 38
UHF
LOCK
RX/TX LOCK
Mode
Description of Power Control Modes
LOCK
DET
0
1
X
0
0
0
UHF Unlocked
Deep Sleep - In this mode all circuitry is powered
down except the power control circuits.
UHF Locked, Rx or Tx
Unlocked
Powerdown - As deep sleep but voltage reference
circuits active. PLL and VCO circuit can still be active
(see TX,RX PLL ON modes)
1
1
1
All PLLs Locked
RX - Receive Channel powered on. Operates in
conjunction with RX mode control.
TX - Transmit Channel powered on. Operates in
conjunction with TX mode control.
Duplex - Receive and Transmit channels active.
Alt RX/TX - Receive and transmit under control of
the PCA control. Receive on when PCA = 0, Transmit
on when PCA = 1
RSSI on. RSSI circuitry is activated when receive
mode subsequently selected. This mode must be
17
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
