MGCM02
Data Sheet
Synthesisers
TPR <2:0>
Prescaler Ratio
The receive and transmit synthesisers are a similar
design and use identical programming. Each
0
1
1
1
1
X
0
0
1
1
X
0
1
0
1
8/9
16/17
32/33
64/65
128/129
synthesiser includes
a
dual modulus (N,N+1)
prescaler followed by 'A and M' counters giving a
total divide ratio of MN + A.
M is a 11 bit number
A is a 7 bit number
N is the prescaler modulus - this can also be
programmed.
Synthesiser Control
The value of A must be less than N
The transmit and receive synthesiser control
programming is independent but has the same
format.
The A and M values are combined to give the RXDIV,
TXDIV values in Words 1 and 2.
Charge Pump Current
Receive Synthesiser
Four charge pump currents for each synthesiser can
be programmed using RCP,TCP<1:0>. Word 5 bits
7:6 and bits 9:8. This allows additional flexibility
when optimising loop filters and overall synthesiser
performance.
M value is programmed in Word 1Bits 20:10
A value is programmed in Word 1 Bits 9:3
The reference divider REFRX, a 15 bit number, is
programmed in Word 3 bits 17:3
The dual modulus prescaler is programmed by
RPR<2:0> - Word 5 Bits 14:12
RCP, TCP <1:0>
Current (µA)
0
0
1
1
0
1
0
1
496
176
96
RPR <2:0>
Prescaler Ratio
0
1
1
1
1
X
0
0
1
1
X
0
1
0
1
8/9
16/17
32/33
64/65
128/129
16
Charge Pump Output control
The charge pump can be inverted using RPP -Word
5 Bit 20 for the receive synthesiser and TPP - Word 4
Bit 18 for the transmit synthesiser.
Transmit Synthesiser
M value is programmed in Word 2 Bits 20:10
A value is programmed in Word 2 Bits 9:3
RPP, TPP
Mode
0
1
Normal
The reference divider REFTX, a 15 bit number, is
programmed in Word 4 bits 17:3
Inverted
The dual modulus prescaler is programmed by
TPR<2:0> - Word 5 Bits 17:15
The charge pump outputs can also be put into a high
impedance inactive state using RTC,TTC - word 5
Bits 11,10. This can be used to minimise settling time
when the synthesiser is idle for short periods
16
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