MA3864
SIGNAL DEFINITIONS
A0-12
Address input pins which select a particular eight bit word within
the memory array.
Q0-7
Data output pins
E1, E2, E3, E4
Are mask programmed, to the customer’s specification, to form
the active LOW chip select function (E).
E
is driven by a 4-input
NAND gate which has E1,E2,E3,E4 or their inverses as it’s
inputs. Unused NAND gate I/Ps will be tied high internally. When
chip select (E) is low, a read is activated. When it is at a high level
it defaults the ROM to a precharge condition and holds the data
output drivers in a high impedance state.
G
Output Enable which when at a high level holds the data output
drivers in a high impedance state. When at a low level, data
output driver state is defined by
CS.
If this signal is not used it
must be connected to VSS.
CHARACTERISTICS AND RATINGS
Symbol
V
CC
V
I
T
A
T
S
Parameter
Supply Voltage
Input Voltage
Operating Temperature
Storage Temperature
Min.
-0.5
-0.3
-55
-65
Max.
7.0
V
DD
+0.3
125
150
Units
V
V
°C
°C
Stresses above those listed may cause permanent
damage to the device. This is a stress rating only and
functlonal operation of the device at these condltions,
or at any other condition above those indicated in the
operations section of this specification, is not implied
Exposure to absolute maxlmum rating conditions for
extended periods may affect device reliability.
Figure 3: Absolute Maximum Ratings
Notes for Table 4:
Characteristics apply to pre radiation at T
A
= -55°C to +125°C with V
DD
= 5V ±10% and to post 100k Rad(Si) total dose
radiation at T
A
= 25°C with V
DD
= 5V ±10% (characteristics at higher radiation levels available on request). GROUP A
SUBGROUPS 1, 2, 3.
Symbol
V
DD
V
lH
V
lL
V
OH1
V
OH2
V
OL
I
LI
I
LO
I
SB1
Parameter
Supply voltage
Logical ‘1’ Input Voltage
Logical ‘0’ Input Voltage
Logical ‘1’ Output Voltage
Logical ‘1’ Output Voltage
Logical ‘0’ Output Voltage
Input Leakage Current
Output Leakage Current
Selected Static Current (CMOS)
Conditions
-
-
-
I
OH1
= -4mA
I
OH2
= -3mA
I
OL
= 8mA
V
IN
= V
DD
or V
SS
all inputs
Chip disabled, V
OUT
= V
DD
or V
SS
All inputs = V
DD
-0.2V
except
CS
= V
SS
+0.2V
f
RC
= 1MHz, all inputs
switching, V
IH
= V
DD
-0.2V
CS
= V
DD
-0.2V
Figure 4: Electrical Characteristics
(TTL)
(CMOS)
(TTL)
(CMOS)
(Option)
Min.
4.5
2.0
0.8 V
DD
V
SS
V
SS
2.4
V
DD
-0.5
-
-
-
-
Typ.
5.0
-
-
-
-
-
-
-
-
-
0.1
Max.
5.5
V
DD
V
DD
0.8
0.2 V
DD
-
-
0.4
±10
±10
2
Units
V
V
V
V
V
V
V
V
µA
µA
mA
I
DD
Dynamic Operating Current
(CMOS)
Standby Supply Current
-
3
10
mA
I
SB2
-
0.1
2
mA
2
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
