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LE87251NQCT 参数 Datasheet PDF下载

LE87251NQCT图片预览
型号: LE87251NQCT
PDF下载: 下载PDF文件 查看货源
内容描述: [Line Driver, 1 Func, 1 Driver, 1 Rcvr, BIPolar, 4 X 4 MM, GREEN, QFN-16]
分类和应用: 驱动接口集成电路驱动器
文件页数/大小: 14 页 / 187 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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Le87251
Worldwide ADSL2+ Dual Channel
Line Driver BD870 Series
Data Sheet
Features
Document Number
June 2009
129739
Fixed Voltage Gain Of 13
450 mA Peak Output Drive Capability
±5 V to ±12 V Dual Supplies Or 10 V to 24 V
Single Supply
44 V
p-p
Differential Output Into a 100
Ω
Load
40.5 V
p-p
Differential Output Into a 60
Ω
Load
Low-power Disable Mode For Each Driver
4 mA Per Amplifier Quiescent Supply Current
-75 dBc THD With 1 MHz Signal Into a 60
Ω
load
16-pin (4 mm x 4 mm) QFN Package
RoHS Compliant
ENCD
Logic
Control
Logic
Control
Ordering Information
Le87251NQC16 pin QFN Green Pkg.Tray
Le87251NQCT16 pin QFN Green Pkg.Tape & Reel
The green package meets RoHS Directive 2002/95/EC of the
European Council to minimize the environmental impact of electrical
equipment.
ENAB
VS+
VS-
GND
Applications
Dual Port Full Rate ADSL2+ Line Drivers
HDSL Line Drivers
VINA
+
VS+
7.5k
A
VOUTA
R
F
50k
VCMAB
Description
The Le87251 is a dual channel differential amplifier
designed to drive full rate ADSL2+ signals with very
low power dissipation. The Le87251 contains two pairs
of wide band amplifiers designed with Zarlink’s HV30
Bipolar SOI process for low power consumption in
DSL systems. The amplifiers have an internal fixed
gain, which helps to eliminate external feedback and
gain setting resistors.
The drivers achieve better than -75 dB MTPR while
driving a 1 MHz, 16Vp_p signal into a 60
Ω
load. The
amplifiers are enabled by forcing the ENAB/ENCD
pins to ground. Leaving the ENAB/ENCD pins floating
or forcing them high will disable the two amplifiers. The
ENAB and ENCD pins are pulled up to an internal
2.5 V through on-chip 50 kΩ resistors.
Le87251 device is one of the most cost-effective and
high performance line drivers for xDSL2+ applications.
R
G
50k
7.5k
VS-
B
VOUTB
R
F
VINB
VINC
VS+
+
7.5k
C
VOUTC
R
F
50k
VCMCD
R
G
50k
7.5k
VS-
D
VOUTD
R
F
VIND
Figure 1 - Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2009, Zarlink Semiconductor Inc. All Rights Reserved.