Le79555
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Data Sheet
Stresses greater than those listed under
Absolute Maximum Ratings
can cause permanent device failure. Functionality at or
above these limits is not implied. Exposure to absolute maximum ratings for extended periods can effect device reliability.
Storage temperature
V
CC
with respect to AGND
V
BAT
with respect to AGND:
Continuous
10 ms
BGND with respect to AGND
A (TIP) or B (RING) to BGND:
Continuous
10 ms (f = 0.1 Hz)
1 µs (f = 0.1 Hz)
250 ns (f = 0.1 Hz)
Current from A (TIP) or B (RING)
RINGOUT/RYOUT1,2 current
RINGOUT/RYOUT1,2 voltage
RINGOUT/RYOUT1,2 transient
DA and DB inputs:
Voltage on ring-trip inputs
Current into ring-trip inputs
C3–C1,D2–D1, CHCLK Input voltage
Maximum power dissipation, continuous,
T
A
= 70°C, No heat sink (See note)
In 44-pin TQFP package
In 32-pin QFN package
Thermal Data:
In 44-pin TQFP package
In 32-pin QFN package
ESD Immunity (Human Body Model)
Notes:
Thermal limiting circuitry on-chip will shut down the circuit at a junction temperature of about 165
°
C. Operation above 145
°
C junction temper-
ature may degrade device reliability.
The thermal performance of a thermally enhanced package is assured through optimized printed circuit board layout. Specified performance re-
quires that the exposed thermal pad be soldered to an equally sized exposed copper surface, which, in turn, conducts heat through multiple vias
to a large internal copper plane.
1.4 W
3.0 W
θ
JA
52°C/W typ
25° C/W typ
JESD22 Class 1C compliant
+0.4 to –70 V
+0.4 to –75 V
+3 to –3 V
V
BAT
to +1 V
–70 to +5 V
–80 to +8 V
–90 to +12 V
±150 mA
50 mA
BGND to +7 V
BGND to +10 V
V
BAT
to 0 V
±10 mA
–0.4 to V
CC
+ 0.4 V
–55 to +150ºC
–0.4 to +7.0 V
Package Assembly
Green package devices are assembled with enhanced, environmental compatible lead-free, halogen-free, and antimony-free
materials. The leads possess a matte-tin plating which is compatible with conventional board assembly processes or newer lead-
free board assembly processes. The peak soldering temperature should not exceed 245°C during printed circuit board assembly.
Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile.
Operating Ranges
Zarlink
guarantees the performance of this device over commercial (0 to 70º C) and industrial (-40 to 85ºC) temperature ranges
by conducting electrical characterization over each range and by conducting a production test with single insertion coupled to
periodic sampling. These characterization and test procedures comply with section 4.6.2 of Bellcore GR-357-CORE Component
Reliability Assurance Requirements for Telecommunications Equipment.
Ambient temperature
V
CC
V
BAT
AGND
BGND with respect to AGND
Load resistance on VTX to ground
–40 to +85
°
C
4.75 to 5.25 V
–40 to –58 V
0V
–100 to +100 mV
20 kΩ min
7
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
