Le79555
Data Sheet
APPLICATION CIRCUITS
RSR2
1.0 MΩ
CSR1
330 nF
RSR1
909 kΩ
DB
DA
RS
RSR
400 Ω
RSR3
1.0 MΩ
RING_SOURCE
RSR4
909 kΩ
CSR2
330 nF
+5 VA
DA
DB
DA
DB
VCC
U1
Le79555
RD
RD
CD
15 nF
35.7 kΩ
CAX
2.2 nF
RFA
50 Ω
VTX
VIN #1
A(TIP)
CIN
A (TIP)
100 nF
RTX1
125 kΩ
HPA
HPB
CHP
220 nF
Secondary
Protector
U2
RRX
124 kΩ
VOUT #1
RSN
B (RING)
COUT
100 nF
RDC1
13 kΩ
B(RING)
RFB
50 Ω
CBX
2.2 nF
RDC2
13 kΩ
RS
RDC
RINGOUT
RINGOUT
RYOUT1
CDC
220 nF
BATTERY
GROUND
RYOUT1
RYOUT2
RSVD
RYOUT2
N/C
AGND
QBAT
ANALOG
GROUND
C7 #1
C6 #1
C5 #1
C4 #1
C3 #1
CD1 #1
D2
D1
C3
C2
C1
CQB
0.33 µF
BGND
VBAT
DVBH
BAT
MUR120
CV1
DET
0.47 µF
CAS
CCAS
CHS
CCH1
15 nF
CCH2
330 nF
560 pF
RCH
1.3 kΩ
VDC
VDC
VREG
CFIL
L1
1mH
0.47 µF
CHCLK
Clock
CHCLK
L
DCHCLK1
MUR120
Note:
1. Please consult Zarlink representatives for details about the secondary protector.
2. For CHCLK operation between 190 kHz and 290 kHz, L1 is recommended to be 2 mH. For CHCLK operation between 290 kHz and 600
kHz, L1 is recommended to be 1 mH.
17
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
