Le58083
Data Sheet
80/81h Write/Read GX Filter Coefficients
MPI Command
R/W = 0: Write
R/W = 1: Read
D7
D6
0
D5
D4
0
D3
D2
0
D1
D0
R/W
Command
1
0
0
0
I/O Data Byte 1
I/O Data Byte 2
C40
C20
m40
m20
C30
C10
m30
m10
Cxy = 0 or 1 in the command above corresponds to Cxy = +1 or −1, respectively, in the equation below.
The coefficient for the GX filter is defined as:
HGX = 1 + (C10 • 2–m10{1 + C20 • 2–m20[1 + C30 • 2–m30(1 + C40 • 2–m40)]}
Power Up and Hardware Reset (RST) Values = A9F0 (Hex) (HGX = 1.995 (6 dB)).
Note:
The default value is contained in a ROM register separate from the programmable coefficient RAM. There is a filter enable bit in Operating Func-
tions Register to switch between the default and programmed values.
82/83h Write/Read GR Filter Coefficients
MPI Command
R/W = 0: Write
R/W = 1: Read
D7
D6
0
D5
D4
0
D3
D2
0
D1
D0
Command:
1
0
0
1
R/W
I/O Data Byte 1
I/O Data Byte 2
C40
C20
m40
m20
C30
C10
m30
m10
Cxy = 0 or 1 in the command above corresponds to Cxy = +1 or −1, respectively, in the equation below.
The coefficient for the GR filter is defined as:
HGR = C10 • 2–m10{1 + C20 • 2–m20[1 + C30 • 2–m30(1 + C40 • 2–m40)]}
Power Up and Hardware Reset (RST) Values = 23A1 (Hex) (HGR = 0.35547 (–8.984 dB)).
See note under Command 80/81h on page 54.
54
Zarlink Semiconductor Inc.
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