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EA218I6BTAV 参数 Datasheet PDF下载

EA218I6BTAV图片预览
型号: EA218I6BTAV
PDF下载: 下载PDF文件 查看货源
内容描述: [LAN Controller, CMOS, PBGA352]
分类和应用: 局域网外围集成电路
文件页数/大小: 27 页 / 358 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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XpressFlow-2020 Series –  
Ethernet Switch Chipset  
EA218  
6+2 Ports 10Mb Ethernet Access Controller  
3. DC SPECIFICATION  
3.1 ABSOLUTE MAXIMUM RATINGS  
Storage Temperature  
Operating Temperature  
-50°C to +125°C  
0°C to +70°C  
Supply Voltage VDD with Respect to VSS  
Voltage on 5V Tolerant Input Pins  
Voltage on Other Input Pins  
+3.0 V to +3.6 V  
-0.5 V to (VDD + 1.8 V)  
-0.5 V to (VDD + 10%)  
Stresses above those listed may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Ab-  
solute Maximum Ratings for extended periods may affect device reliability.  
3.2 DC CHARACTERISTICS  
VDD = +3.0 V to +3.6 V  
TAMBIENT = 0°C to +70°C  
Preliminary  
Typ  
Symbol  
fosc  
Parameter Description  
Frequency of Operation (-40)  
Min  
Max  
Unit  
20  
20  
20  
40.0000  
50.0000  
66.6667  
500  
MHz  
MHz  
MHz  
mA  
mA  
mA  
V
Frequency of Operation (-50)  
Frequency of Operation (-66)  
IDD  
Supply Power – @ 40 MHz (VDD =3.3 V)  
Supply Power – @ 50 MHz (VDD =3.3 V)  
Supply Power – @ 66.67 MHz (VDD =3.3 V)  
Output High Voltage (CMOS) IOH = maximum  
Output Low Voltage (CMOS) IOL = maximum  
Output High Voltage (TTL) IOH = maximum  
Output Low Voltage (TTL) IOL = maximum  
Input High Voltage (CMOS)  
300  
300  
300  
500  
500  
VOH-CMOS  
VOL-CMOS  
VOH-TTL  
VOL-TTL  
VIH-CMOS  
VIL-CMOS  
VIH-TTL  
VIL-TTL  
VDD - 0.5  
2.4  
0.45  
V
V
0.45  
VDD + 10%  
VDD x 30%  
VDD + 10%  
+0.8  
V
VDD x 70%  
-0.5  
V
Input Low Voltage (CMOS)  
V
Input High Voltage (TTL)  
2.0  
V
Input Low Voltage (TTL)  
-0.3  
V
VIH-5VT  
VIL-5VT  
Input High Voltage (TTL 5V tolerant)  
Input Low Voltage (TTL 5V tolerant)  
2.0  
VDD + 1.8  
+0.8  
V
-0.3  
V
ILI  
Input Leakage Current (0.1 V ) VIN ) VDD  
)
10  
µA  
(all pins except those with internal pull-up/pull-down resis-  
tors)  
ILO  
IIH  
Output Leakage Current (0.1 V ) VOUT ) VDD  
Input Leakage Current VIH = VDD - 0.1 V  
(pins with internal pull-down resistors)  
Input Leakage Current VIL = 0.1 V  
(pins with internal pull-up resistors)  
Input Capacitance  
)
15  
60  
µA  
µA  
IIL  
-60  
µA  
CIN  
COUT  
CI/O  
8
8
pF  
pF  
pF  
Output Capacitance  
I/O Capacitance  
10  
Notes:  
© 1998 Zarlink Semiconductor, Inc.  
20  
Rev. 2.1- February, 1999  
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