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54RHSCFE 参数 Datasheet PDF下载

54RHSCFE图片预览
型号: 54RHSCFE
PDF下载: 下载PDF文件 查看货源
内容描述: [Logic Circuit,]
分类和应用:
文件页数/大小: 11 页 / 184 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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54HSC/T630
Total dose radiation not
exceeding 3x10
5
Rad(SI)
Symbol
V
DD
V
IH1
V
IL1
V
IH2
V
IL2
V
OH1
V
OL1
V
OH2
V
OL2
I
1L
I
1H
I
2L
I
2H
I
DD
Parameter
Supply Voltage
TTL Input High Voltage
TTL Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
TTL Output High Voltage
TTL Output Low Voltage
CMOS Output High Voltage
CMOS Output Low Voltage
Input Low Current
Input High Current
IO Low Current
IO High Current
Power Supply Current
Conditions
-
-
-
-
-
I
OH
= -4mA
I
OL
= 12mA (CB or DB),
I
OL
= 4mA (SEF or DEF)
I
OH
= -4mA
I
OL
= 12mA (CB or DB),
I
OL
= 4mA (SEF or DEF)
V
DD
= 5.5, V
IN
= V
SS
V
DD
= 5.5, V
IN
= V
DD
V
DD
= 5.5, V
IN
= V
SS
V
DD
= 5.5, V
IN
= V
DD
V
DD
= Max, S0 & S1 at
5.5V, All CB & DB pins
grounded, DEF & SEF
open
Min
4.5
2.0
-
3.5
-
2.4
-
V
DD
-0.5
-
-
-
-
-
-
Typ
5.0
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
5.5
-
0.8
-
1.5
-
0.4
-
0.5
-10
50
-50
50
1
Units
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
mA
V
DD
= 5V±10%, over full operating temperature range.
Mil-Std-883, method 5005, subgroups 1, 2, 3
Parameters at higher radiation levels available on request.
Table 6: Electrical Characteristics
AC ELECTRICAL CHARACTERISTICS
Parameter
t
PLH
Propogation delay time, low-to-high-level output (Note 4)
t
PLH
Propogation delay time, low-to-high-level output (Note 4)
t
PLH
Propogation delay time, low-to-high-level output (Note 5)
t
PLH
Propogation delay time, low-to-high-level output (Note 5)
t
PZH
Output enable time to high level (Note 6)
t
PZL
Output enable time to low level (Note 6)
t
PHZ
Output disable time to high level (Note 7)
t
PLZ
Output disable time to low level (Note 7)
t
S
Set-up time to S1 ›
t
H
Hold time after S1 ›
From
To
(Input) (Output) Min. Max. Units
Conditions (HST)
DB
DB
S1
S1
S0
S0
S0
S0
CB, DB
CB, DB
CB
CB
DEF
SEF
CB, DB
CB, DB
CB, DB
CB, DB
-
-
-
-
-
-
-
-
-
-
30
15
58
58
29
29
40
45
45
65
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
S0 = 0V, S1 = 0V
S0 = 0V, S1 = 0V
S0 = 3V
S0 = 3V
S1 = 3V (fig. 5)
S1 = 3V (fig. 4)
S1 = 3V (fig. 5)
S1 = 3V (fig. 4)
-
-
Conditions (HSC)
S0 = 0V, S1 = 0V
S0 = 0V, S1 = 0V
S0 = V
DD
-1V
S0 = V
DD
-1V
S1 = V
DD
-1V (fig. 5)
S1 = V
DD
-1V (fig. 4)
S1 = V
DD
-1V (fig. 5)
S1 = V
DD
-1V (fig. 4)
-
-
1. V
DD
= 5V ±10% and CL = 50pF, over full operating temperature and total dose = 300K Rad(Si)
2. Input Pulse V
SS
to 3.0 Volts.(TTL), V
DD
-1V (CMOS).
3. Times Measurement Reference Level 1.5 Volts.
4. These parameters describe the time intervals taken to generate the check word during the memory write cycle.
5. These parameters describe the time intervals taken to flag errors during memory read cycle.
6. These parameters describe the time intervals taken to correct and output the data word and to generate and output the syndrome error code during
the memory read cycle.
7. These parameters describe the time intervals taken to disable the CB & DB buses in preparation for a new data word during the memory read cycle.
8. Mil-Std-883, method 5005, subgroups 9, 10, 11
9.
Parameters at higher radiation levels available on request.
Table 7: AC Electrical Characteristics
5