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YMF724F-V 参数 Datasheet PDF下载

YMF724F-V图片预览
型号: YMF724F-V
PDF下载: 下载PDF文件 查看货源
内容描述: 为PCI总线的高性能音频控制器 [high performance audio controller for the PCI Bus]
分类和应用: 控制器PC
文件页数/大小: 50 页 / 267 K
品牌: YAMAHA [ YAMAHA CORPORATION ]
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YMF724F  
3Ch: Interrupt Line  
Read / Write  
Default: 00h  
Access Bus Width: 8, 16, 32-bit  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
Interrupt Line  
b[7:0] ..........Interrupt Line  
This register indicates the interrupt channel that INTA# is assigned to.  
3Dh: Interrupt Pin  
Read Only  
Default: 01h  
Access Bus Width: 8, 16, 32-bit  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
Interrupt Pin  
b[7:0] ..........Interrupt Pin  
DS-1 supports INTA# only. This register is hardwired to 01h.  
3Eh: Minimum Grant  
Read Only  
Default: 05h  
Access Bus Width: 8, 16, 32-bit  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
Minimum Grant  
b[7:0] ..........Minimum Grant  
This register indicates the length of the burst period required by DS-1.  
This register is hardwired to 05h.  
3Fh: Maximum Latency  
Read Only  
Default: 19h  
Access Bus Width: 8, 16, 32-bit  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
Maximum Latency  
b[7:0] ..........Maximum Latency  
This register indicates how often DS-1 generates the Bus Master Request.  
This register is hardwired to 19h.  
January 14, 1999  
-16-  
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