YAC520
Example of PCB Layout
■
Digital Logic
Digital Ground Plane
SDATAI
SDATAO
Analog Circuit
0.1µF
0.1µF
47µF
47µF
DVDD
4.7Ω
4.7Ω
+5V
AVDD
47µF 0.1µF
10µF
47µF 0.1µF
10µF
Analog Ground Plane
To achieve the maximum performance of this device, it is necessary to take special care for the power
supply and the method of grounding. (The above figure shows an example of the layout on the PCB that
assumes the daisy chain connection of two HGVC1s.) Connect a regulated low noise 5 V power supply to
AVDD, and de-couple with DVDD through a resistor for the purpose of avoiding mixing of noise that is
generated in the serial interface. (Refer to ■ Example of System Configuration) At this time, the de-
coupling capacitor should be located as close as possible to HGVC1. The analog domain and digital domain
should be grounded separately, and HGVC1 should be located in the analog domain side, so that a pattern
layout with minimized impedance to AVSS and DVSS pins can be achieved. The analog ground and digital
ground should be given sufficiently wide areas respectively so that the radiation of the noise can be
suppressed effectively.
Control signals such as serial interface should be placed collectively in the area nearer to the digital ground
plane (upper side), and analog signals and digital signals should be arranged without crossing each other and
without running side by side to prevent their interference.
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YAMAHA [ YAMAHA CORPORATION ]
