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XCF16PFSG48C 参数 Datasheet PDF下载

XCF16PFSG48C图片预览
型号: XCF16PFSG48C
PDF下载: 下载PDF文件 查看货源
内容描述: Platform Flash在系统可编程配置PROM [Platform Flash In-System Programmable Configuration PROMs]
分类和应用: 存储内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 46 页 / 752 K
品牌: XILINX [ XILINX, INC ]
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R
Platform Flash In-System Programmable Configuration PROMs
Platform Flash PROM TAP Characteristics
The Platform Flash PROM family performs both in-system
programming and IEEE 1149.1 boundary-scan (JTAG)
testing via a single 4-wire Test Access Port (TAP). This
simplifies system designs and allows standard Automatic
Test Equipment to perform both functions. The AC
characteristics of the Platform Flash PROM TAP are
described as follows.
T
CKMIN
TAP Timing
shows the timing relationships of the TAP signals.
These TAP timing characteristics are identical for both
boundary-scan and ISP operations.
TCK
T
MSS
T
MSH
TMS
T
DIS
T
DIH
TDI
T
DOV
TDO
DS026_04_020300
Figure 4:
Test Access Port Timing
TAP AC Parameters
shows the timing parameters for the TAP waveforms shown in
Table 10:
Test Access Port Timing Parameters
Symbol
T
CKMIN
T
MSS
T
MSH
T
DIS
T
DIH
T
DOV
Description
TCK minimum clock period when V
CCJ
= 2.5V or 3.3V
TMS setup time when V
CCJ
= 2.5V or 3.3V
TMS hold time when V
CCJ
= 2.5V or 3.3V
TDI setup time when V
CCJ
= 2.5V or 3.3V
TDI hold time when V
CCJ
= 2.5V or 3.3V
TDO valid delay when V
CCJ
= 2.5V or 3.3V
Min
100
10
25
10
25
Max
30
Units
ns
ns
ns
ns
ns
ns
DS123 (v2.11.1) March 30, 2007
Product Specification
9