R
Platform Flash In-System Programmable Configuration PROMs
instruction sequence. The iMPACT software also outputs
serial vector format (SVF) files for use with any tools that
accept SVF format, including automatic test equipment.
During in-system programming, the CEO output is driven
High. All other outputs are held in a high-impedance state or
held at clamp levels during in-system programming. All
non-JTAG input pins are ignored during in-system
programming, including CLK, CE, CF, OE/RESET, BUSY,
EN_EXT_SEL, and REV_SEL[1:0]. In-system programming
is fully supported across the recommended operating
voltage and temperature ranges.
Embedded, in-system programming reference designs,
such as
Xilinx In-System Programming Using an
Embedded Microcontroller,
are available on the Xilinx web
page for
See
Platform Flash PROM User Guide,
for
an advanced update methodology that uses the Design
Revisioning feature in the Platform Flash XCFxxP PROMs.
See
Platform Flash PROM User Guide,
for detailed
guidelines on PROM-to-FPGA configuration hardware
connections, for software usage, for a reference list of Xilinx
FPGAs, and for the respective compatible Platform Flash
PROMs.
lists the Platform Flash PROMs and their
capacities.
Table 2:
Platform Flash PROM Capacity
Platform
Flash PROM
XCF01S
XCF02S
XCF04S
Configuration
Bits
1,048,576
2,097,152
4,194,304
Platform
Flash PROM
XCF08P
XCF16P
XCF32P
Configuration
Bits
8,388,608
16,777,216
33,554,432
Programming
The Platform Flash PROM is a reprogrammable NOR flash
device (refer
for the program/erase specifications).
Reprogramming requires an erase followed by a program
operation. A verify operation is recommended after the
program operation to validate the correct transfer of data
from the programmer source to the Platform Flash PROM.
Several programming solutions are available.
OE/RESET
The 1/2/4 Mb XCFxxS Platform Flash PROMs in-system
programming algorithm results in issuance of an internal
device reset that causes OE/RESET to pulse Low.
External Programming
In-System Programming
In-System Programmable PROMs can be programmed
individually, or two or more can be daisy-chained together
and programmed in-system via the standard 4-pin JTAG
protocol as shown in
X-Ref Target - Figure 3
In traditional manufacturing environments, third-party
device programmers can program Platform Flash PROMs
with an initial memory image before the PROMs are
assembled onto boards. Contact a preferred third-party
programmer vendor for Platform Flash PROM support
information. A sample list of third-party programmer
vendors with Platform Flash PROM support is available on
the Xilinx web page for
See
Platform Flash PROM User Guide,
for the PROM data file format required for programmers.
Pre-programmed PROMs can be assembled onto boards
using the typical soldering process guidelines in
Device Package User Guide.
A pre-programmed PROM’s
memory image can be updated after board assembly using
an in-system programming solution.
V
CC
GND
Reliability and Endurance
(b)
DS123_33_031908
(a)
Figure 3:
JTAG In-System Programming Operation
(a) Solder Device to PCB
(b) Program Using Download Cable
In-system programming offers quick and efficient design
iterations and eliminates unnecessary package handling or
socketing of devices. The programming data sequence is
delivered to the device using either Xilinx iMPACT software
and a Xilinx download cable, a third-party JTAG
development system, a JTAG-compatible board tester, or a
simple microprocessor interface that emulates the JTAG
Xilinx in-system programmable products provide a
guaranteed endurance level of 20,000 in-system
program-erase cycles and a minimum data retention of 20
years. Each device meets all functional, performance, and
data retention specifications within this endurance limit.
See
Xilinx Device Reliability Report,
for device
quality, reliability, and process node information.
DS123 (v2.17) October 26, 2009
Product Specification
3
XILINX [ XILINX, INC ]
