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Virtex-5 Family Overview
Virtex-5 FPGA Documentation
Complete and up-to-date documentation of the Virtex-5 family of FPGAs is available on the Xilinx website. In addition to the
most recent Virtex-5 Family Overview, the following files are also available for download:
Virtex-5 FPGA Data Sheet: DC and Switching
Virtex-5 FPGA RocketIO GTX Transceiver User Guide
Characteristics (DS202)
(UG198)
This data sheet contains the DC and Switching
Characteristic specifications for the Virtex-5 family.
This guide describes the RocketIO GTX transceivers
available in the Virtex-5 TXT and FXT platforms.
Virtex-5 FPGA User Guide (UG190)
Virtex-5 FPGA Tri-Mode Ethernet MAC User Guide
(UG194)
This guide includes chapters on:
This guide describes the dedicated Tri-Mode Ethernet
Media Access Controller available in the Virtex-5 LXT, SXT,
TXT, and FXT platforms.
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Clocking Resources
Clock Management Technology (CMT)
Phase-Locked Loops (PLL)
Block RAM
Configurable Logic Blocks (CLBs)
SelectIO Resources
Virtex-5 FPGA Integrated Endpoint Block for PCI
Express Designs User Guide (UG197)
This guide describes the integrated Endpoint blocks in the
Virtex-5 LXT, SXT, TXT, and FXT platforms that are PCI
Express compliant.
SelectIO Logic Resources
Advanced SelectIO Logic Resources
Virtex-5 FPGA XtremeDSP Design Considerations
(UG193)
Embedded Processor Block in Virtex-5 FPGAs
Reference Guide (UG200)
This guide describes the DSP48E slice and includes
reference designs for using DSP48E math functions and
various filters.
This reference guide is a description of the embedded
processor block available in the Virtex-5 FXT platform.
Virtex-5 FPGA Configuration Guide (UG191)
This all-encompassing configuration guide includes
chapters on configuration interfaces (serial and parallel),
multi-bitstream management, bitstream encryption,
Boundary-Scan and JTAG configuration, and
reconfiguration techniques.
Virtex-5 FPGA Packaging and Pinout Specification
(UG195)
This specification includes the tables for device/package
combinations and maximum I/Os, pin definitions, pinout
tables, pinout diagrams, mechanical drawings, and thermal
specifications.
Virtex-5 FPGA PCB Designer’s Guide (UG203)
This guide provides information on PCB design for Virtex-5
devices, with a focus on strategies for making design
decisions at the PCB and interface level.
Virtex-5 FPGA System Monitor User Guide (UG192)
The System Monitor functionality is outlined in this guide.
Virtex-5 FPGA RocketIO GTP Transceiver User Guide
(UG196)
This guide describes the RocketIO GTP transceivers
available in the Virtex-5 LXT and SXT platforms.
DS100 (v5.1) August 21, 2015
www.xilinx.com
Product Specification
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