R
Platform Flash XL High-Density Configuration and Storage Device
Table 41: Protection Register Information
Offset
Data
Description
Value
Number of protection register fields in JEDEC ID space. 0000hindicates that
256 fields are available.
(P+E)h = 118h
0002h
2
(P+F)h = 119h
(P+10)h = 11Ah
(P+ 11)h = 11Bh
(P+12)h = 11Ch
(P+13)h = 11Dh
(P+14)h = 11Eh
(P+15)h = 11Fh
(P+16)h = 120h
(P+17)h = 121h
(P+18)h = 122h
(P+19)h = 123h
(P+1A)h = 124h
(P+1B)h = 125h
(P+1C)h = 126h
0080h
0000h
0003h
0003h
0089h
0000h
0000h
0000h
0000h
0000h
0000h
0010h
0000h
0004h
80h
00h
8 bytes
8 bytes
89h
00h
00h
00h
0
Protection Register 1: Protection Description:
Bits 0-7 Lower byte of protection register address
Bits 8-15 Upper byte of protection register address
Bits 16-23 2n bytes in factory pre-programmed region
Bits 24-31 2n bytes in user programmable region
Protection Register 2: Protection Description:
Bits 0-31 protection register address
Bits 32-39 n number of factory programmed regions (lower byte)
Bits 40-47 n number of factory programmed regions (upper byte)
Bits 48-55 2n bytes in factory programmable region
Bits 56-63 n number of user programmable regions (lower byte)
Bits 64-71 n number of user programmable regions (upper byte)
Bits 72-79 2n bytes in user programmable region
0
0
16
0
16
Table 42: Burst Read Information
Offset
Data
Description
Value
8 bytes
4
Page-mode read capability
bits 0-7 n’ such that 2n HEX value represents the number of read-page
bytes. See offset 0028hfor device word width to determine page-mode data
output width.
(P+1D)h = 127h
(P+1E)h = 128h
0003h
0004h
Number of synchronous mode read configuration fields that follow.
Synchronous mode read capability configuration 1
bit 3-7 Reserved
bit 0-2 n’ such that 2n+1 HEX value represents the maximum number of
continuous synchronous reads when the device is configured for its
maximum word width. A value of 07hindicates that the device is capable of
continuous linear bursts that output data until the internal burst counter
reaches the end of the device’s burstable address space. This field’s 3-bit
value can be written directly to the read configuration register bit 0-2 if the
device is configured for its maximum word width. See offset 0028hfor word
width to determine the burst data output width.
(P+1F)h = 129h
0001h
4
Synchronous mode read capability configuration 2
Synchronous mode read capability configuration 3
Synchronous mode read capability configuration 4
8
(P+20)h = 12Ah
(P-21)h = 12Bh
(P+22)h = 12Ch
0002h
0003h
0007h
16
Cont.
(1,2)
Table 43: Bank and Erase Block Region Information
Offset
Data
Description
Number of Bank Regions within the device
(P+23)h = 12Dh
02h
Notes:
1. The variable P is a pointer which is defined at CFI offset 015h.
2. Bank Regions. There are two Bank Regions, see Table 35, page 61.
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
66
XILINX [ XILINX, INC ]
