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18V01SC 参数 Datasheet PDF下载

18V01SC图片预览
型号: 18V01SC
PDF下载: 下载PDF文件 查看货源
内容描述: 在系统可编程配置PROM [In-System Programmable Configuration PROMs]
分类和应用: 可编程只读存储器
文件页数/大小: 21 页 / 227 K
品牌: XILINX [ XILINX, INC ]
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R
XC18V00 Series In-System Programmable Configuration PROMs  
OPTIONAL  
Daisy-chained  
FPGAs with  
different  
DOUT  
configurations  
FPGA  
(2)  
Vcco  
OPTIONAL  
Slave FPGAs  
with identical  
4.7K  
(1)  
configurations  
Modes  
(2)  
(2)  
VCCO  
VCCINT  
(2)  
Vcco  
VCCINT VCCO  
(2)  
Vcco  
4.7K  
VCCO  
VCCINT  
DATA  
VCCINT VCCO  
DATA  
DIN  
First  
PROM  
Cascaded  
PROM  
CCLK  
CLK  
CE  
CLK  
CE  
CEO  
DONE  
INIT  
OE/RESET  
CF  
OE/RESET  
CF  
PROGRAM  
Notes:  
1
2
For Mode pin connections and Done pullup value, refer to the appropriate FPGA data sheet.  
For compatible voltages, refer to the appropriate FPGA data sheet.  
(a) Master Serial Mode  
(1)  
(1)  
I/O  
I/O  
(4)  
VCCINT VCCO  
(4)  
External  
Osc  
VCCINT VCCO  
(3)  
CS  
WRITE  
(2)  
Modes  
1K  
Vcco  
1K  
VIRTEX  
Select MAP  
(4)  
Vcco  
VCCINT VCCO  
VCCINT VCCO  
(4)  
(4)  
Vcco  
NC  
BUSY  
4.7K  
XC18Vxx  
XC18Vxx  
(2)  
4.7K  
CLK  
CLK  
CCLK  
D[0:7]  
DONE  
INIT  
8
PROGRAM  
CEO  
CF  
CEO  
CF  
D[0:7]  
CE  
D[0:7]  
CE  
OE/RESET  
OE/RESET  
Notes:  
1
2
3
4
CS and WRITE must be either driven Low or pulled down externally. One option is shown.  
For Mode pin connections and Done pullup value, refer to the appropriate FPGA data sheet.  
External oscillator required for Virtex/Virtex-E SelectMAP or Virtex-II/Virtex-II Pro Slave-SelectMAP modes.  
For compatible voltages, refer to the appropriate FPGA data sheet.  
(b) Virtex/Virtex-E/Virtex-II/Virtex-II Pro SelectMAP Mode  
(1)  
I/O  
(4)  
(1)  
External  
Osc  
VCCINT VCCO  
I/O  
1K  
Vcco  
(3)  
CS  
(2)  
Modes  
WRITE  
1K  
Spartan-II,  
Spartan-IIE  
(4)  
Vcco  
VCCINT VCCO  
(4)  
VCCINT  
(4)  
NC  
BUSY  
3.3K  
XC18Vxx  
(2)  
4.7K  
CLK  
CCLK  
D[0:7]  
DONE  
INIT  
8
PROGRAM  
D[0:7]  
CE  
CF  
OE/RESET  
Notes:  
1
2
CS and WRITE must be pulled down to be used as I/O. One option is shown.  
For Mode pin connections and Done pullup value and if Drive Done configuration option is not active, refer to  
the appropriate FPGA data sheet.  
3
External oscillator required for Spartan-II/Spartan-IIE Slave-Parallel modes.  
4 For compatible voltages, refer to the appropriate FPGA data sheet.  
(c) Spartan-II/Spartan-IIE Slave-Parallel Mode  
DS026_05_060403  
Figure 7: (a) Master Serial Mode (b) Virtex/Virtex-E/Virtex-II Pro SelectMAP Mode (c) Spartan-II/Spartan-IIE  
Slave-Parallel Mode (dotted lines indicate optional connection)  
DS026 (v4.0) June 11, 2003  
www.xilinx.com  
11  
Product Specification  
1-800-255-7778