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X9241AYV 参数 Datasheet PDF下载

X9241AYV图片预览
型号: X9241AYV
PDF下载: 下载PDF文件 查看货源
内容描述: 四数控电位器( XDCP ) [Quad Digitally Controlled Potentiometer (XDCP)]
分类和应用: 转换器电位器数字电位计电阻器光电二极管
文件页数/大小: 18 页 / 365 K
品牌: XICOR [ XICOR INC. ]
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X9241A  
Figure 8. Detailed Potentiometer Block Diagram  
Serial Data Path  
Serial  
Bus  
Input  
V /R  
H
H
From Interface  
Circuitry  
Register 0  
Register 2  
Register 1  
Parallel  
Bus  
Input  
8
6
C
o
u
n
t
e
r
Wiper  
Counter  
Register  
Register 3  
D
e
c
o
d
e
2
INC/DEC  
Logic  
UP/DN  
If WCR = 00[H] then V /R = V /R  
L
W
W
L
UP/DN  
If WCR = 3F[H] then V /R = V /R  
V /R  
W
W
H
H
Modified SCL  
L
L
CLK  
DW  
Cascade  
Control  
Logic  
V
/R  
W
W
CM  
Cascade Mode  
The state of DW enables or disables the wiper. When  
the DW bit of the WCR is set to “0” the wiper is enabled;  
when set to “1” the wiper is disabled. If the wiper is  
disabled, the wiper terminal will be electrically isolated  
and float.  
The X9241A provides a mechanism for cascading the  
arrays. That is, the sixty-three resistor elements of one  
array may be cascaded (linked) with the resistor  
elements of an adjacent array. The V /R of the higher  
L
L
order array must be connected to the V /R of the  
lower order array (See Figure 9).  
H
H
When operating in cascade mode V /R , V /R and  
H
H
L
L
the wiper terminals of the cascaded arrays must be  
electrically connected externally. All but one of the  
wipers must be disabled. The user can alter the wiper  
position by writing directly to the WCR or indirectly by  
transferring the contents of the Data Registers to the  
WCR or by using the Increment/Decrement command.  
Cascade Control Bits  
The data byte, for the three-byte commands, contains 6  
bits (LSBs) for defining the wiper position plus two high  
order bits, CM (Cascade Mode) and DW (Disable  
Wiper, normal operation).  
When using the Increment/Decrement command the  
wiper position will automatically transition between  
arrays. The current position of the wiper can be  
determined by reading the WCR registers; if the DW bit  
is “0”, the wiper in that array is active. If the current  
wiper position is to be maintained on power-down a  
global XFR WCR to Data Register command must be  
issued to store the position in NV memory before  
power-down.  
The state of the CM bit (bit 7 of WCR) enables or  
disables cascade mode. When the CM bit of the WCR  
is set to “0” the potentiometer is in the normal operation  
mode. When the CM bit of the WCR is set to “1” the  
potentiometer is cascaded with its adjacent higher  
order potentiometer. For example; if bit 7 of WCR2 is  
set to “1”, pot 2 will be cascaded to pot 3.  
Characteristics subject to change without notice. 8 of 18  
REV 1.1.13 12/09/02  
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