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X9221YSI 参数 Datasheet PDF下载

X9221YSI图片预览
型号: X9221YSI
PDF下载: 下载PDF文件 查看货源
内容描述: 双E2POT⑩非易失性数字电位计 [Dual E2POT⑩ Nonvolatile Digital Potentiometer]
分类和应用: 数字电位计
文件页数/大小: 14 页 / 67 K
品牌: XICOR [ XICOR INC. ]
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X9221  
Instruction Structure  
current wiper position to a data register is a write to  
nonvolatile memory and takes a minimum of t to  
complete. The transfer can occur between either poten-  
tiometer and their associated registers or it may occur  
between both of the potentiometers and one of their  
associated registers.  
WR  
The next byte sent to the X9221 contains the instruction  
and register pointer information. The four most signifi-  
cant bits are the instruction. The next four bits point to  
one of two pots and when applicable they point to one of  
four associated registers. The format is shown below in  
Figure 2.  
Four instructions require a three-byte sequence to  
complete. These instructions transfer data between the  
host and the X9221; either between the host and one of  
the data registers or directly between the host and the  
WCR. These instructions are: Read WCR, read the  
current wiper position of the selected pot; Write WCR,  
change current wiper position of the selected pot; Read  
Data Register, read the contents of the selected non-  
volatile register; Write Data Register, write a new value  
to the selected data register. The sequence of opera-  
tions is shown in Figure 4.  
Figure 2. Instruction Byte Format  
POTENTIOMETER  
SELECT  
I3  
I2  
I1  
I0  
0
P0  
R1  
R0  
INSTRUCTIONS  
REGISTER  
SELECT  
3079 ILL F09.1  
The Increment/Decrement command is different from  
the other commands. Once the command is issued and  
the X9221 has responded with an acknowledge, the  
master can clock the selected wiper up and/or down in  
one segment steps; thereby, providing a fine tuning  
The four high order bits define the instruction. The sixth  
bit (P0) selects which one of the two potentiometers is  
to be affected by the instruction. The last two bits (R1  
andR0)selectoneofthefourregistersthatistobeacted  
upon when a register oriented instruction is issued.  
capability to the host. For each SCL clock pulse (t  
)
HIGH  
while SDA is HIGH, the selected wiper will move one  
resistor segment towards the V terminal. Similarly, for  
H
Fourofthenineinstructionsendwiththetransmissionof  
the instruction byte. The basic sequence is illustrated in  
Figure 3. These two-byte instructions exchange data  
between the WCR and one of the data registers. A  
transfer from a data register to a WCR is essentially a  
write to a static RAM. The response of the wiper to this  
each SCL clock pulse while SDA is LOW, the selected  
wiper will move one resistor segment towards the V  
L
terminal. A detailed illustration of the sequence and  
timing for this operation are shown in Figures 5 and 6  
respectively.  
action will be delayed t  
. A transfer from WCR’s  
STPWV  
Figure 3. Two-Byte Command Sequence  
SCL  
SDA  
S
T
A
R
T
0
1
0
1
A3 A2 A1 A0  
A
C
K
I3 I2  
I1 I0  
0
P0 R1 R0  
A
C
K
S
T
O
P
3079 ILL F10  
4