X24325
WEL and RWEL are volatile latches that power-up in
the LOW (disabled) state. A write to any address other
than FFFh, where the Write Protect Register is
located, will be ignored (no ack) until the WEL bit is set
HIGH. The WEL bit is set by writing 0000001x to
address FFFh. Once set, WEL remains HIGH until
either reset (by writing 00000000 to FFFh) or until the
part powers-up again. The RWEL bit controls writes to
the block protect bits. RWEL is set by first setting WEL
= 1 and then writing 0000011x to address FFFh.
RWEL must be set in order to change the block protect
bits, BP0 and BP1, or the WPEN bit. RWEL is reset
when the block protect or WPEN bits are changed, or
when the part powers-up again.
WRITE PROTECT REGISTER
The Write Protect Register (WPR) is located at the
highest address, FFFh.
Figure 11. Write Protect Register
WPR (Addr = FFFh)
7
6
5
4
3
1
0
0
2
WPEN
0
0
BP1
BP0
WEL
RWEL
6552 ILL F15
WPR.1 = WEL
– Write Enable Latch (Volatile)
0 = Write enable latch reset, writes disabled
1 = Write enable latch set, writes enabled
Programming the BP or WPEN Bits
A three step sequence is required to change the
nonvoltaile Block Protect or Write Protect Enable:
If WEL = 0 then “no ACK” after first byte of input data.
WPR.2 = RWEL
1) Set WEL = 1 (write 00000010 to address FFFh,
volatile write cycle)
– Register Write Enable Latch (Volatile)
0 = Register write enable latch reset, writes dis-
abled
(Start)
1 = Register write enable latch set, writes enabled
2) Set RWEL = 1 (write 00000110 to address FFFh,
volatile write cycle)
WPR.3, WPR.4 = BP0, BP1
– Block Protect Bits (Nonvolatile)
(See Block Protect section for definition)
(Start)
WPR.7 = WPEN
– Write Protect Enable Bit (Nonvolatile)
(See Hardware Write Protect section for definition)
3) Set BP1, BP0, and/or WPEN bits (Write w00yz010
to address FFFh)
w = WPEN, y = BP1, Z = BP0,
(Stop)
Writing to the Write Protect Register
The Write Protect Register is written by performing a
random write of one byte directly to address, FFFh. If a
page write is performed starting with any address
other than FFFh, the byte in the array at address FFFh
will be written instead of the Write Protect Register
(assuming writes are not disabled by the block protect
register).
Step 3 is a nonvolatile write cycle, requiring 10ms to
complete. RWEL is reset (0) by this write cycle,
requiring another write cycle to set RWEL again before
the block protect bits can be changed. RWEL must be
0 in step 3; if w00yz110 is written to address FFFh,
RWEL is set but WPEN, BP1 and BP0 are not
changed (the device remains at step 2).
The state of the Write Protect Register can be read by
performing a random read at address FFFh at any
time. If a sequential read starting at any other address
than FFFh is performed, the contents of the byte in the
array at FFFh is read out instead of the Write Protect
Register.
9
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