X24128
Bus Timing
t
t
t
t
HIGH
LOW
R
F
SCL
t
t
t
t
t
SU:STA
HD:STA
HD:DAT
SU:DAT
SU:STO
SDAIN
t
t
t
AA
DH
BUF
SDAOUT
7027 FM 14
Write Cycle Limits
Symbol
(5)
Parameter
Min.
Typ.
Max.
Units
ms
(6)
TWC
Write Cycle Time
5
10
7027 FRM T11
Notes: (5) Typical values are for T = 25°C and nominal supply voltage (5V).
A
(6) t
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
WR
time the device requires to automatically complete the internal write operation.
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/write
cycle. During the write cycle, the X24128 bus interface circuits are disabled, SDA is allowed to remain HIGH, and
the device does not respond to its slave address.
Bus Timing
SCL
ACK
SDA
8th BIT
WORD n
t
WR
STOP
CONDITION
START
CONDITION
7027 FM 15
Guidelines for Calculating Typical Values of
Bus Pull-Up Resistors
SYMBOL TABLE
WAVEFORM
INPUTS
OUTPUTS
120
V
Must be
steady
Will be
steady
CC MAX
R
=
=1.8KΩ
MIN
I
100
80
OL MIN
t
R
May change
from Low to
High
Will change
from Low to
High
R
=
MAX
C
BUS
MAX.
60
40
20
0
RESISTANCE
May change
from High to
Low
Will change
from High to
Low
MIN.
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
RESISTANCE
20 40 60 80
0
100 120
N/A
Center Line
is High
Impedance
BUS CAPACITANCE (pF)
7027 FM 16
7027 FM 17
13
XICOR [ XICOR INC. ]
