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X1240 参数 Datasheet PDF下载

X1240图片预览
型号: X1240
PDF下载: 下载PDF文件 查看货源
内容描述: 实时时钟/日历与EEPROM [Real Time Clock/Calendar with EEPROM]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 19 页 / 78 K
品牌: XICOR [ XICOR INC. ]
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X1240  
Figure 10. Current Address Read Sequence  
S
Signals from  
t
S
t
o
p
the Master  
a
Slave  
Address  
r
t
SDA Bus  
1
1 1 1 1  
A
C
K
Signals from  
the Slave  
Data  
Random Read  
newly loaded address. This operation could be useful  
if the master knows the next address it needs to read,  
but is not ready for the data.  
Random read operation allows the master to access  
any memory location in the array. Prior to issuing the  
Slave Address Byte with the R/W bit set to one, the  
master must first perform a “dummy” write operation.  
Sequential Read  
Sequential reads can be initiated as either a current  
address read or random address read. The first Data  
Byte is transmitted as with the other modes; however,  
the master now responds with an acknowledge, indicat-  
ing it requires additional data. The device continues to  
output data for each acknowledge received. The master  
terminates the read operation by not responding with  
an acknowledge and then issuing a stop condition.  
The master issues the start condition and the Slave  
Address Byte, receives an acknowledge, then issues  
the Word Address Bytes. After acknowledging receipts  
of the Word Address Bytes, the master immediately  
issues another start condition and the Slave Address  
Byte with the R/W bit set to one. This is followed by an  
acknowledge from the device and then by the eight bit  
word. The master terminates the read operation by not  
responding with an acknowledge and then issuing a  
stop condition. Refer to Figure 11 for the address,  
acknowledge, and data transfer sequence.  
The data output is sequential, with the data from address  
n followed by the data from address n + 1. The address  
counter for read operations increments through all page  
and column addresses, allowing the entire memory  
contents to be serially read during one operation. At  
the end of the address space the counter “rolls over” to  
the start of the address space and the device continues  
to output data for each acknowledge received. Refer  
to Figure 12 for the acknowledge and data transfer  
sequence.  
In a similar operation, called “Set Current Address,”  
the device sets the address if a stop is issued instead of  
the second start shown in Figure 11. The X1240 then  
goes into standby mode after the stop and all bus activity  
will be ignored until a start is detected. This operation  
loads the new address into the address counter. The next  
Current Address Read operation will read from the  
Figure 11. Random Address Read Sequence  
S
t
S
S
t
Signals from  
the Master  
Slave  
Address  
Word  
Address 0  
Slave  
Address  
Word  
Address 1  
t
a
r
a
r
t
o
p
t
SDA Bus  
1
1 1 1 0 0 0 000  
1
1 1 1 1  
A
C
K
A
C
K
A
C
K
A
C
K
Signals from  
the Slave  
Data  
10