Production Data
WM9715L
VARIABLE RATE AUDIO / SAMPLE RATE CONVERSION
By using an AC’97 Rev2.2 compliant audio interface, the WM9715L can record and playback at all
commonly used audio sample rates, and offer full split-rate support (i.e. the DAC, ADC and
AUXDAC sample rates are completely independent of each other – any combination is possible).
The default sample rate is 48kHz. If the VRA bit in register 2Ah is set and the appropriate block is
enabled, then other sample rates can be selected by writing to registers 2Ch, 32h and 2Eh. The AC-
Link continues to run at 48k frames per second irrespective of the sample rate selected. However, if
the sample rate is less than 48kHz, then some frames do not carry an audio sample.
REGISTER
ADDRESS
BIT
LABEL
VRA
DEFAULT
DESCRIPTION
2Ah
0
0 (OFF)
Variable Rate Audio
Extended
Audio
Stat/Ctrl
0: OFF (DAC and ADC run at 48kHz)
1: ON (sample rates determined by
registers 2Ch, 2Eh and 32h)
2Ch
15:0
DACSR
BB80h
Audio DAC sample rate
1F40h: 8kHz
Audio DAC
(48kHz)
Sample Rate
2B11h: 11.025kHz
2EE0h: 12kHz
3E80h: 16kHz
5622h: 22.05kHz
5DC0h: 24kHz
7D00h: 32kHz
AC44h: 44.1kHz
BB80h: 48kHz
Any other value defaults to the nearest
supported sample rate
32h
15:0
15:0
ADCSR
BB80h
Audio ADC sample rate
similar to DACSR
Audio ADC
Sample Rate
(48kHz)
Note writing to these bits has no effect
when ADC is disabled
2Eh
AUXDAC
SR
BB80h
(48kHz)
AUXDAC sample rate
similar to DACSR
AUXDAC
Sample Rate
Table 22 Audio Sample Rate Control
When the audio ADC is disabled, its sample rate cannot be changed (i.e. writing to the ADCSR bits
has no effect). The following sequence of register writes is therefore recommended for changing the
ADC sample rate:
1. Set PD11 and/or PD12 = 0 in register 24h as appropriate for
left/right/stereo ADC operation
2. Set PR0 = 0 in register 26h to enable the audio ADC(s)
3. Set VRA = 1 in register 2Ah to enable Variable Rate Audio
4. Set ADCSR in register 32h to the appropriate value for the
desired sample rate
PD Rev 4.0 December 2007
37
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
