欢迎访问ic37.com |
会员登录 免费注册
发布采购

WM9715LGEFL/RV 参数 Datasheet PDF下载

WM9715LGEFL/RV图片预览
型号: WM9715LGEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: AC'97音频和触摸屏CODEC [AC’97 Audio and Touchpanel CODEC]
分类和应用:
文件页数/大小: 77 页 / 900 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
 浏览型号WM9715LGEFL/RV的Datasheet PDF文件第30页浏览型号WM9715LGEFL/RV的Datasheet PDF文件第31页浏览型号WM9715LGEFL/RV的Datasheet PDF文件第32页浏览型号WM9715LGEFL/RV的Datasheet PDF文件第33页浏览型号WM9715LGEFL/RV的Datasheet PDF文件第35页浏览型号WM9715LGEFL/RV的Datasheet PDF文件第36页浏览型号WM9715LGEFL/RV的Datasheet PDF文件第37页浏览型号WM9715LGEFL/RV的Datasheet PDF文件第38页  
WM9715L  
Production Data  
DIGITAL AUDIO (SPDIF) OUTPUT  
The WM9715L supports the SPDIF standard using the SPDIF_OUT pin as its output.  
Register 3Ah is a read/write register that controls SPDIF functionality and manages bit fields  
propagated as channel status (or sub-frame in the V case). With the exception of V, this register  
should only be written to when the SPDIF transmitter is disabled (SPDIF bit in register 2Ah is ‘0’).  
Once the desired values have been written to this register, the contents should be read back to  
ensure that the sample rate in particular is supported, then SPDIF validity bit SPCV in register 2Ah  
should be read to ensure the desired configuration is valid. Only then should the SPDIF enable bit in  
register 2Ah be set. This ensures that control and status information start up correctly at the  
beginning of SPDIF transmission.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
2Ah  
10  
5:4  
SPCV  
SPSA  
0
SPDIF validity bit (read-only)  
SPDIF slot assignment (ADCO = 0)  
00: Slots 3, 4  
Extended  
Audio  
01  
01: Slots 6, 9  
10: Slots 7, 8  
11: Slots 10, 11  
2
SEN  
0
SPDIF output enable  
1 = enabled, 0 = disabled  
Note: Bit 5 of register 4Ch and bit 5 of register  
56h must be ‘0’ before the SPDIF output can  
be enabled.  
3Ah  
15  
V
0
Validity bit; ‘0’ indicates frame valid, ‘1’  
indicates frame not valid  
SPDIF  
Control  
Register  
14  
DRS  
SPSR  
0
Indicates that the WM9715L does not support  
double rate SPDIF output (read-only)  
13:12  
10  
Indicates that the WM9715L only supports  
48kHz sampling on the SPDIF output (read-  
only)  
11  
10:4  
3
L
0
Generation level; programmed as required by  
user  
CC  
0000000  
Category code; programmed as required by  
user  
PRE  
COPY  
AUDIB  
PRO  
ADCO  
0
0
0
0
0
Pre-emphasis; ‘0’ indicates no pre-emphasis,  
‘1’ indicates 50/15us pre-emphasis  
2
Copyright; ‘0’ indicates copyright is not  
asserted, ‘1’ indicates copyright  
1
Non-audio; ‘0’ indicates data is PCM, ‘1’  
indicates non-PCM format (e.g. DD or DTS)  
0
Professional; ‘0’ indicates consumer, ‘1’  
indicates professional  
5Ch  
4
Source of SPDIF data  
Additional  
Function  
Control  
0: SPDIF data comes from SDATAOUT (pin  
5), slot selected by SPSA  
1: SPDIF data comes from audio ADC  
Table 20 SPDIF Output Control  
PD Rev 4.0 December 2007  
34  
w
 复制成功!