WM8985
Pre-Production
SYMBOL
tline_midrail_on
tline_midrail_off
thp_midrail_on
MIN
TYPICAL
300
MAX
UNIT
ms
s
>6
300
ms
s
thp__midrail_off
tdacint
>6
2/fs
n/fs
n/fs
DAC Group Delay
29/fs
Table 4 Typical POR Operation (Typical Simulated Values)
Notes:
1. The lineout charge time, tline_midrail_on, is determined by the VMID pin charge time. This time is
dependent upon the value of VMID decoupling capacitor and VMID pin input resistance and
AVDD1 power supply rise time. The values above were measured using a 4.7µF capacitor.
2. It is not advisable to allow DACDAT data input during initialisation of the DAC. If the DAC data
value is not zero at point of initialisation, then this is likely to cause a pop noise on the analogue
outputs. The same is also true if the DACDAT is removed at a non-zero value, and no mute
function has been applied to the signal beforehand.
3. The lineout discharge time, tline_midrail_off, is determined by the VMID pin discharge time. This time
is dependent upon the value of VMID decoupling capacitor and VMID pin input resistance. The
values above were measured using a 4.7µF capacitor.
4. The headphone charge time, thp_midrail_on, is dependent upon the value of VMID decoupling
capacitor and VMID pin input resistance and AVDD1 power supply rise time. The values above
were measured using a 4.7µF VMID decoupling capacitor.
5. The headphone discharge time, thp_midrail_off, is dependent upon the value of VMID decoupling
capacitor and VMID pin input resistance. The values above were measured using a 4.7µF VMID
decoupling capacitor.
6. The VMIDSEL and BIASEN bits must be set to enable analogue output midrail voltage and for
normal DAC operation.
PP, Rev 3.4, October 2006
26
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
