WM8976
Pre-Production
POWER CONSUMPTION
Typical current consumption for various scenarios is shown below.
AVDD
(3.0V)
(mA)
DCVDD
(1.8V)
(mA)
0.0008
0.0008
1.0
DBVDD1
(3.0V)
(mA)
<0.0001
<0.0001
0.001
TOTAL
POWER
(mW)
0.12
0.12
14.1
21.1
29.4
66.1
MODE
Off
0.043
Sleep (VREF maintained, no clocks)
MIC Record (8kHz)2
Stereo 16Ω HP Playback (48kHz, quiescent)2
Stereo 16Ω HP Playback (48kHz, white noise)2
Stereo 16Ω HP Playback (48kHz, sine wave)2
Notes:
0.04
4.1
3.3
5.4
18
6.2
0.004
7.3
0.004
6.7
0.004
1. DBVDD Current will increase with greater loading on digital I/O pins.
2. 5 Band EQ is enabled.
3. AVDD standby current will fall to nearer 15uA when thermal shutdown sensor is disabled.
Table 1 Power Consumption
ESTIMATING SUPPLY CURRENT
When either the DAC or ADC is enabled approximately 7mA will be drawn from DCVDD when
DCVDD=1.8V and fs=48kHz. When the PLL is enabled approximately 1.5mA additional current will
be drawn from DCVDD.
As a general rule, digital supply currents will scale in proportion to sample rates. Supply current for
analogue and digital blocks will also be lower at lower supply voltages.
Power consumed by the output drivers will depend greatly on the signal characteristics. A quiet
signal, or a signal with long periods of silence will consume less power than a signal which is
continuously loud.
Estimated supply current for the analogue blocks is shown in Table 2. Note that power dissipated in
the load is not shown.
PP Rev 3.0 April 2006
12
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
