Pre-Production
WM8961
REGISTER
SETTING
COMMENT
Reset device if required
0x0F - write
0x0000
0x0F - read
0x08 - write
0x57 - write
0x5A - write
-
Read Chip ID (=0x1801)
Enable system clocks
0x01F4
0x0020
0x0080
Enable the write sequencer.
Start the write sequencer to configure pre-programmed
enable of the DAC playback (digital input to headphone
output) path. Analogue input PGAs still muted.
Allow enough time for the sequencer to finish
0x5D - read
-
Read status of write sequencer and wait until the
WSEQ_BUSY,bit0,=0 which indicates that the DAC
playback path has been configured. Then continue.
0x5A - write
0x0092
Start the write sequencer to configure pre-programmed
enable of the ADC record (line input to digital output)
path
Allow enough time for the sequencer to finish
0x5D - read
0x00 - write
0x01 - write
-
Read status of write sequencer and wait until the
WSEQ_BUSY,bit0,=0. Then continue.
0x011F
0x011F
Unmute left analogue input, leave input PGA volume
gain at default 0dB
Unmute right analogue input, leave input PGA volume
gain at default 0dB
Table 72 Register Settings for LRINPUT to ADC Record
PP, August 2009, Rev 3.1
114
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