Pre-Production
WM8959
The following table describes the coding of the fields listed in Table 38.
REGISTER
ADDRESS
LABEL
DEFAULT
DESCRIPTION
Registers
R19 (13h)
to
GPIOn_DEB_ENA
0b
De-Bounce
0 = disabled (Not de-bounced)
(n = 1, 3, 4, 5, 7 or 8)
1 = enabled (Requires MCLK input and
TOCLK_ENA = 1)
R21 (15h)
GPIOn_IRQ_ENA
0b
0b
IRQ Enable
(See Table
38)
(n = 1, 3, 4, 5, 7 or 8)
0 = disabled
1 = enabled
GPIOn_PU
GPIO Pull-Up Resistor Enable
0 = Pull-up disabled
(n = 1, 3, 4 or 5)
1 = Pull-up enabled (Approx 150kΩ)
GPIO Pull-Down Resistor Enable
0 = Pull-down disabled
1 = Pull-down enabled (Approx 150kΩ)
GPIOn Pin Function Select
0000 = Input pin
GPIOn_PD
See
Table 38
(n = 1, 3, 4 or 5)
GPIOn_SEL[3:0]
(n = 1, 3, 4 or 5)
0000b
0001 = Clock output (SYSCLK/OPCLKDIV)
0010 = Logic '0'
0011 = Logic '1'
0100 = PLL Lock output
0101 = Temperature OK output
0110 = SDOUT data output
0111 = IRQ output
1000 = MIC Detect
1001 = MIC Short Circuit Detect
1010 to 1111 = Reserved
GPIn Input Pin Enable
GPIn_ENA
(n = 7 or 8)
0b
0 = pin disabled as GPIn input
1 = pin enabled as GPIn input
Table 39 GPIO Function Control Bits
The polarity of GPIO/GPI inputs may be configured using the GPIO_POL register bits. This is
described in Table 40.
REGISTER BIT
ADDRESS
LABEL
DEFAULT
DESCRIPTION
R23 (17h)
7:0
GPIO_POL
[7:0]
00h
GPIOn Input Polarity
0 = Non-inverted
(rw)
1 = Inverted
GPIO_POL[7] = GPI8 polarity
GPIO_POL[6] = GPI7 polarity
GPIO_POL[5] = Reserved
GPIO_POL[4] = GPIO5 polarity
GPIO_POL[3] = GPIO4 polarity
GPIO_POL[2] = GPIO3 polarity
GPIO_POL[1] = Reserved
GPIO_POL[0] = GPIO1 polarity
Table 40 GPIO Polarity
Each of the available GPIO functions is described in turn in the following sections.
PP, May 2008, Rev 3.1
75
w