Pre-Production
WM8959
The speaker mixer SPKMIX, the speaker PGA SPKPGA and the outputs SPKN and SPKP are
controlled as described in Table 29. Care should be taken to avoid clipping when enabling more than
one path to the speaker mixer.
Register bits SPKATTN control the speaker output attenuation and can be used to avoid clipping
when more than one full scale signal is input to the mixer. Fine adjustment of the speaker output can
be made using the SPKVOL register field.
To prevent "zipper noise" when adjusting the SPKVOL, a zero-cross function is provided so that,
when enabled, volume updates will not take place until a zero-crossing is detected. In the event of a
long period without zero-crossings, a timeout function is available. When this function is enabled
(using the TOCLK_ENA register bit), the volume will update after the timeout period if no earlier zero-
cross has occurred. The timeout period is set by TOCLK_RATE. See “Clocking and Sample Rates”
for more information on these fields.
REGISTER
ADDRESS
BIT
LABEL
LB2SPK
DEFAULT
DESCRIPTION
R54 (36h)
7
0b
AINLMUX Output to SPKMIX
0 = Mute
1 = Un-mute
6
5
4
3
2
1
RB2SPK
LI2SPK
0b
0b
0b
0b
0b
0b
AINRMUX Output to SPKMIX
0 = Mute
1 = Un-mute
LIN2 to SPKMIX
0 = Mute
1 = Un-mute
RI2SPK
RIN2 to SPKMIX
0 = Mute
1 = Un-mute
LOPGASPK
ROPGASPK
LDSPK
LOPGA to SPKMIX
0 = Mute
1 = Un-mute
ROPGA to SPKMIX
0 = Mute
1 = Un-mute
Left DAC to SPKMIX
0 = Mute
1 = Un-mute
Note: LDSPK must be muted when
LDLO=1
0
RDSPK
0b
Right DAC to SPKMIX
0 = Mute
1 = Un-mute
Note: RDSPK must be muted when
RDRO=1
R34 (22h)
R38 (26h)
1:0
SPKATTN
[1:0]
11b
Speaker Output Attenuation (SPKN
and SPKP)
00 = 0dB
01 = -6dB
10 = -12dB
11 = mute
7
SPKZC
0b
SPKPGA Zero Cross Enable
0 = Zero cross disabled
1 = Zero cross enabled
SPKPGA Volume
6:0
SPKVOL
[6:0]
79h
(0dB)
(see Table 28 for SPKPGA volume
control range)
Table 29 Speaker Output Volume Control
PP, May 2008, Rev 3.1
63
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
