欢迎访问ic37.com |
会员登录 免费注册
发布采购

WM8959 参数 Datasheet PDF下载

WM8959图片预览
型号: WM8959
PDF下载: 下载PDF文件 查看货源
内容描述: 移动多媒体DAC,具有双模式AB / D类扬声器驱动器 [Mobile Multimedia DAC with Dual-Mode Class AB/D Speaker Driver]
分类和应用: 驱动器
文件页数/大小: 155 页 / 2044 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
 浏览型号WM8959的Datasheet PDF文件第56页浏览型号WM8959的Datasheet PDF文件第57页浏览型号WM8959的Datasheet PDF文件第58页浏览型号WM8959的Datasheet PDF文件第59页浏览型号WM8959的Datasheet PDF文件第61页浏览型号WM8959的Datasheet PDF文件第62页浏览型号WM8959的Datasheet PDF文件第63页浏览型号WM8959的Datasheet PDF文件第64页  
WM8959  
Pre-Production  
OUTPUT SIGNAL PATH VOLUME CONTROL  
The output drivers LOPGA, ROPGA, LOUT and ROUT can be independently controlled as shown in  
Table 27 and Table 28.  
To minimise pop noise it is recommended that only the LOPGAVOL, ROPGAVOL, LOUTVOL and  
ROUTVOL are modified while the output signal path is active. Other gain controls are provided in the  
output signal path to provide appropriate relative scaling of signals from different sources, and to  
prevent clipping when multiple signals are mixed. To prevent pop noise, only the gain controls noted  
above should be modified while playback is active.  
To prevent "zipper noise", a zero-cross function is provided on these output paths, so that when  
enabled, volume updates will not take place until a zero-crossing is detected. In the event of a long  
period without zero-crossings, a timeout function is available. When this function is enabled (using  
the TOCLK_ENA register bit), the volume will update after the timeout period if no earlier zero-cross  
has occurred. The timeout period is set by TOCLK_RATE. See “Clocking and Sample Rates” for  
more information on these fields.  
The OPVU bit controls the loading of the output driver volume data. When OPVU is set to 0, the  
volume control data will be loaded into the respective control register, but will not actually change the  
gain setting. The LOPGA, ROPGA, LOUT and ROUT volume settings are all updated when a 1 is  
written to OPVU. This makes it possible to update the gain of all output paths simultaneously.  
Note that the headphone outputs LOUT and ROUT have dedicated volume controls. As a result, the  
output PGAs LOPGA and ROPGA do not need to be enabled to provide volume control for the LOUT  
and ROUT outputs.  
REGISTER  
ADDRESS  
BIT  
LABEL  
OPVU[2]  
DEFAULT  
DESCRIPTION  
R32 (20h)  
R33 (21h)  
R28 (1Ch)  
8
N/A  
Output PGA Volume Update  
Writing a 1 to this bit will update  
LOPGA, ROPGA, LOUTVOL and  
ROUTVOL volumes simultaneously.  
7
LOPGAZC  
0b  
LOPGA Zero Cross Enable  
0 = Zero cross disabled  
1 = Zero cross enabled  
LOPGA Volume  
6:0  
8
LOPGAVOL  
[6:0]  
79h  
(0dB)  
(See Table 28 for output PGA volume  
control range)  
OPVU[3]  
N/A  
0b  
Output PGA Volume Update  
Writing a 1 to this bit will update  
LOPGA, ROPGA, LOUTVOL and  
ROUTVOL volumes simultaneously.  
7
ROPGAZC  
ROPGA Zero Cross Enable  
0 = Zero cross disabled  
1 = Zero cross enabled  
ROPGA Volume  
6:0  
8
ROPGAVOL  
[6:0]  
79h  
(0dB)  
(See Table 28 for output PGA volume  
control range)  
OPVU[0]  
N/A  
0b  
Output PGA Volume Update  
Writing a 1 to this bit will update  
LOPGA, ROPGA, LOUTVOL and  
ROUTVOL volumes simultaneously.  
7
LOZC  
LOUT (Left Headphone Output) Zero  
Cross Enable  
0 = Zero cross disabled  
1 = Zero cross enabled  
6:0  
LOUTVOL  
[6:0]  
00h  
LOUT (Left Headphone Output)  
Volume  
(mute)  
(See Table 28 for output PGA volume  
control range)  
PP, May 2008, Rev 3.1  
60  
w
 复制成功!