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WM8945 参数 Datasheet PDF下载

WM8945图片预览
型号: WM8945
PDF下载: 下载PDF文件 查看货源
内容描述: 单声道低功耗编解码器与视频缓冲器和触摸屏控制器 [Mono Low-Power CODEC with Video Buffer and Touch Panel Controller]
分类和应用: 解码器编解码器控制器
文件页数/大小: 169 页 / 1604 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8945  
Production Data  
To determine the characteristics of the loudspeaker in an application, a test signal is applied to the  
target application. A reference microphone is positioned in the normal acoustic path of the  
loudspeaker, and the received signal is analysed to determine how accurately the loudspeaker has  
reproduced the test signal.  
5-BAND EQ  
ReTuneTM  
5-band EQ  
Signal Enhancement Block 2 (SE2)  
The 5-band EQ is part of the SE2 block. This function allows 5 frequency bands to be controlled. The  
upper and lower frequency bands are controlled by low-pass and high-pass filters respectively. The  
middle three frequency bands are notch filters. The cut-off / centre frequency of each filter is  
programmable, and up to 12dB gain or attenuation can be selected in each case. The 5-band EQ is  
enabled using the SE2_5BEQ_L_ENA register bit defined in Table 14. For the derivation of the other  
associated registers, refer to the WISCE software.  
Typical applications of the 5-band EQ include the selection of user-preferences for different music  
types, such as ‘rock’, ‘dance’ or ‘classical’ EQ profiles.  
DYNAMIC RANGE CONTROL (DRC)  
DRC  
Signal Enhancement Block 3 (SE3)  
The Dynamic Range Control (DRC) forms the SE3 block. The DRC provides a range of compression,  
limiting and noise gate functions to support optimum configuration for recording or playback modes.  
The DRC is configured using the control fields in registers R29 to R35 – see “Dynamic Range  
Control”.  
SIGNAL ENHANCEMENT REGISTER CONTROLS  
The SE1 ‘enable’ bits are described in Table 13. Note that other control fields must also be  
determined and written to the WM8945 using WISCE™ or other tools. The registers described below  
only allow the sub-blocks of SE1 to be enabled or disabled.  
Note that it is not recommended to access these control fields unless appropriate values have been  
written to the associated bits in registers R65 to R95.  
PD, May 2011, Rev 4.1  
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