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WM8945 参数 Datasheet PDF下载

WM8945图片预览
型号: WM8945
PDF下载: 下载PDF文件 查看货源
内容描述: 单声道低功耗编解码器与视频缓冲器和触摸屏控制器 [Mono Low-Power CODEC with Video Buffer and Touch Panel Controller]
分类和应用: 解码器编解码器控制器
文件页数/大小: 169 页 / 1604 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8945  
Production Data  
TABLE OF CONTENTS  
DESCRIPTION....................................................................................................... 1  
FEATURES............................................................................................................ 1  
APPLICATIONS..................................................................................................... 1  
TABLE OF CONTENTS......................................................................................... 2  
BLOCK DIAGRAM ................................................................................................ 5  
PIN CONFIGURATION.......................................................................................... 6  
ORDERING INFORMATION.................................................................................. 6  
PIN DESCRIPTION................................................................................................ 7  
ABSOLUTE MAXIMUM RATINGS........................................................................ 8  
RECOMMENDED OPERATING CONDITIONS..................................................... 8  
THERMAL PERFORMANCE................................................................................. 9  
ELECTRICAL CHARACTERISTICS ................................................................... 10  
TERMINOLOGY............................................................................................................. 13  
TYPICAL PERFORMANCE................................................................................. 14  
POWER CONSUMPTION.............................................................................................. 15  
AUDIO SIGNAL PATHS DIAGRAM.................................................................... 16  
SIGNAL TIMING REQUIREMENTS .................................................................... 17  
SYSTEM CLOCK TIMING.............................................................................................. 17  
AUDIO INTERFACE TIMING ......................................................................................... 17  
MASTER MODE........................................................................................................................................17  
SLAVE MODE ...........................................................................................................................................18  
CONTROL INTERFACE TIMING................................................................................... 19  
DEVICE DESCRIPTION ...................................................................................... 22  
INTRODUCTION............................................................................................................ 22  
ANALOGUE INPUT SIGNAL PATH............................................................................... 23  
INPUT PGA ENABLE ................................................................................................................................24  
INPUT PGA CONFIGURATION ................................................................................................................24  
MICROPHONE BIAS CONTROL ..............................................................................................................25  
INPUT PGA GAIN CONTROL...................................................................................................................25  
DIGITAL MICROPHONE INTERFACE .......................................................................... 27  
ANALOGUE-TO-DIGITAL CONVERTER (ADC)............................................................ 28  
ADC VOLUME CONTROL.........................................................................................................................28  
ADC HIGH PASS FILTER .........................................................................................................................31  
DSP CORE.....................................................................................................................32  
DSP CONFIGURATION MODES ..............................................................................................................32  
LOW-PASS / HIGH-PASS FILTER (LPF/HPF)..........................................................................................33  
5-NOTCH FILTER .....................................................................................................................................34  
DF1 FILTER...............................................................................................................................................35  
RETUNETM FILTER ...................................................................................................................................35  
5-BAND EQ ...............................................................................................................................................36  
DYNAMIC RANGE CONTROL (DRC).......................................................................................................36  
SIGNAL ENHANCEMENT REGISTER CONTROLS.................................................................................36  
DYNAMIC RANGE CONTROL (DRC) ........................................................................... 37  
DRC COMPRESSION / EXPANSION / LIMITING.....................................................................................38  
GAIN LIMITS .............................................................................................................................................40  
GAIN READBACK .....................................................................................................................................41  
DYNAMIC CHARACTERISTICS ...............................................................................................................42  
ANTI-CLIP CONTROL...............................................................................................................................43  
QUICK-RELEASE CONTROL ...................................................................................................................44  
DRC INITIAL VALUE.................................................................................................................................44  
PD, May 2011, Rev 4.1  
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