WM8945
Production Data
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
ADC Volume Update
REFER TO
R27 (1Bh)
Left ADC
Digital Vol
12
ADC_VU
0
Writing a 1 to this bit enables the Left ADC volume to
be updated
Left ADC Digital Mute
0 = Disable Mute
1 = Enable Mute
Left ADC Digital Volume
0000_0000 = mute
0000_0001 = -71.625dB
0000_0010 = -71.250dB
…
8
ADCL_MUTE
0
7:0
ADCL_VOL
[7:0]
1100_0000
1100_0000 = 0dB
...
1111_1111 = +23.625dB
Register 1Bh Left ADC Digital Vol
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
DRC Noise Gate Enable
0 = Disabled
R29 (1Dh)
DRC Control
1
8
DRC_NG_ENA
0
1 = Enabled
DRC Enable
7
2
1
DRC_ENA
DRC_QR
0
1
1
0 = Disabled
1 = Enabled
DRC Quick-release Enable
0 = Disabled
1 = Enabled
DRC Anti-clip Enable
0 = Disabled
DRC_ANTICLI
P
1 = Enabled
Register 1Dh DRC Control 1
PD, May 2011, Rev 4.1
128
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
