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WM8940GEFL/RV 参数 Datasheet PDF下载

WM8940GEFL/RV图片预览
型号: WM8940GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 单声道编解码器与扬声器驱动器 [Mono CODEC with Speaker Driver]
分类和应用: 解码器驱动器编解码器
文件页数/大小: 85 页 / 819 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
 浏览型号WM8940GEFL/RV的Datasheet PDF文件第64页浏览型号WM8940GEFL/RV的Datasheet PDF文件第65页浏览型号WM8940GEFL/RV的Datasheet PDF文件第66页浏览型号WM8940GEFL/RV的Datasheet PDF文件第67页浏览型号WM8940GEFL/RV的Datasheet PDF文件第69页浏览型号WM8940GEFL/RV的Datasheet PDF文件第70页浏览型号WM8940GEFL/RV的Datasheet PDF文件第71页浏览型号WM8940GEFL/RV的Datasheet PDF文件第72页  
WM8940  
Pre-Production  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
REFER TO  
7
6
5
MONOEN  
0
MONOOUT enable  
0 = disabled  
Analogue Outputs  
Analogue Outputs  
Analogue Outputs  
1 = enabled  
SPKNEN  
SPKPEN  
0
0
SPKOUTN enable  
0 = disabled  
1 = enabled  
SPKOUTP enable  
0 = disabled  
1 = enabled  
4
3
Reserved  
0
0
MONOMIXEN  
Mono Mixer Enable  
0 = disabled  
Analogue Outputs  
Analogue Outputs  
1 = enabled  
2
SPKMIXEN  
DACEN  
0
Speaker Mixer Enable  
0 = disabled  
1 = enabled  
1
0
0
0
Reserved  
DAC enable  
Analogue Outputs  
0 = DAC disabled  
1 = DAC enabled  
Reserved  
4 (04h)  
15:10  
9
00h  
0
LOUTR  
LOUTR control  
0=normal  
Digital Audio  
Interfaces  
1=Input mono channel data output on left and right  
channels  
8
7
BCP  
0
0
BCLK polarity  
0=normal  
Digital Audio  
Interfaces  
1=inverted  
FRAMEP  
Frame clock polarity  
0=normal  
Digital Audio  
Interfaces  
1=inverted  
DSP Mode control  
1 = Configures the interface so that MSB is available  
on 1st BCLK rising edge after FRAME rising edge  
0 = Configures the interface so that MSB is available  
on 2nd BCLK rising edge after FRAME rising edge  
6:5  
4:3  
WL  
10  
10  
Word length  
Digital Audio  
Interfaces  
00=16 bits  
01=20 bits  
10=24 bits  
11=32 bits  
FMT  
Audio interface Data Format Select:  
00=Right Justified  
01=Left Justified  
10=I2S format  
Digital Audio  
Interfaces  
11= DSP/PCM mode  
2
1
DLRSWAP  
ALRSWAP  
0
0
Controls whether DAC data appears in ‘right’ or ‘left’  
phases of FRAME clock:  
Digital Audio  
Interfaces  
0=DAC data appear in ‘left’ phase of FRAME  
1=DAC data appears in ‘right’ phase of FRAME  
Controls whether ADC data appears in ‘right’ or ‘left’  
phases of FRAME clock:  
Digital Audio  
Interfaces  
0=ADC data appear in ‘left’ phase of FRAME  
1=ADC data appears in ‘right’ phase of FRAME  
Pre-Production, Rev 3.0, February 2007  
68  
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