Pre-Production
WM8940
REGISTER BITS BY ADDRESS
Notes:
1. Default values of N/A indicate non-latched data bits (e.g. software reset or volume update bits).
2. Register bits marked as "Reserved" should not be changed from the default.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
N/A
DESCRIPTION
REFER TO
0 (00h)
[15:0] RESET /
CHIP_ID
Writing to this register will apply a software reset.
Reading from this register will return the device id
Resetting the
Chip /
Control Interface
1 (01h)
15:9
00
0
Reserved
8
VMID_OP_EN
Enables the non-VMID derived bias current generator Power
without enabling the VMID buffer. This bit must be set Management
to 1 if output amplifiers are to be enabled before VMID
is active. Once VMID and VMID buffer are enabled
this bit can be left set to 0 or left set to 1.
7
6
LVLSHIFT_EN
AUXEN
0
0
Enable bit for the level shifters. 1 for normal operation, Power
0 for standby.
Management
Auxiliary input buffer enable
0 = OFF
Auxiliary Inputs
1 = ON
5
4
3
PLLEN
0
0
0
PLL enable
Master Clock and
Phase Locked
Loop (PLL)
0=PLL off
1=PLL on
MICBEN
BIASEN
Microphone Bias Enable
0 = OFF (high impedance output)
1 = ON
Microphone
Biasing Circuit
Analogue amplifier bias control
0=Disabled
Power
Management
1=Enabled
2:0
2
DEVICE_REVI 000
SION
Readback from this register will return the device
revision in this position
Control Interface
BUFIOEN
0
Enable bit for the VMID buffer. The VMID buffer is
used to maintain a buffered VMID voltage on all
analogue input and output pins. 1. for normal
operation 0. for standby (where inputs and outputs
settle to GND).
Enabling the
Outputs
1:0
VMIDSEL
00
Reference string impedance to VMID pin:
00=off (open circuit)
01=75kΩ
Power
Management
10=300kΩ
11=2.5kΩ
2 (02h)
15:5
4
000h
0
Reserved
BOOSTEN
INPPGAEN
ADCEN
Input BOOST enable
0 = Boost stage OFF
1 = Boost stage ON
Reserved
Input Boost
3
2
0
0
Input microphone PGA enable
0 = disabled
Input Signal Path
1 = enabled
1
0
0
0
Reserved
ADC Enable Control
0 = ADC disabled
1 = ADC enabled
Reserved
Analogue to
Digital Converter
(ADC)
3 (03h)
15:8
00h
Pre-Production, Rev 3.0, February 2007
67
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
