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WM8940GEFL/RV 参数 Datasheet PDF下载

WM8940GEFL/RV图片预览
型号: WM8940GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 单声道编解码器与扬声器驱动器 [Mono CODEC with Speaker Driver]
分类和应用: 解码器驱动器编解码器
文件页数/大小: 85 页 / 819 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8940  
Pre-Production  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R56  
7
MONOATTN  
0
Attenuation control for bypass path  
(output of input boost stage) to mono  
mixer input  
Mono mixer  
control  
0 = 0dB  
1 = -10dB  
0=No mute  
6
MONOMUTE  
0
1=Output muted. During mute the  
mono output will output VMID which can  
be used as a DC reference for a  
headphone out.  
2
1
0
AUX2MONO  
BYP2MONO  
DAC2MONO  
0
0
0
Output of Auxilary amplifier to mono  
mixer input:  
0 = not selected  
1 = selected  
Bypass path (output of input boost  
stage) to mono mixer input  
0 = non selected  
1 = selected  
Output of DAC to mono mixer input  
0 = not selected  
1 = selected  
Table 37 Mono Mixer Control  
ENABLING THE OUTPUTS  
Each analogue output of the WM8940 can be separately enabled or disabled. The analogue mixer  
associated with each output has a separate enable. All outputs are disabled by default. To save  
power, unused parts of the WM8940 should remain disabled.  
Outputs can be enabled at any time, but it is not recommended to do so when BUFIO is disabled  
(BUFIOEN=0), as this may cause pop noise (see “POP Minimisation” section).  
REGISTER  
ADDRESS  
BIT  
LABEL  
BIASEN  
DEFAULT  
DESCRIPTION  
R1  
3
2
0
0
Analogue amplifiers bias enable  
VMID buffer enable  
Power  
BUFIOEN  
management 1  
R3  
7
6
5
3
2
MONOEN  
SPKNEN  
0
0
0
0
0
MONOOUT enable  
SPKOUTN enable  
SPKOUTP enable  
Mono mixer enable  
Speaker Mixer enable  
Power  
management 3  
SPKPEN  
MONOMIXEN  
SPKMIXEN  
Note: All “Enable” bits are 1 = ON, 0 = OFF  
Table 38 Output Stages Power Management Control  
UNUSED ANALOGUE INPUTS/OUTPUTS  
Whenever an analogue input/output is disabled, it remains connected to AVDD/2 through a resistor.  
This helps to prevent pop noise when the output is re-enabled. The resistance between the voltage  
buffer and the output pins can be controlled using the VROI control bit. The default impedance is  
low, so that any capacitors on the outputs can charge up quickly at start-up. If a high impedance is  
desired for disabled outputs, VROI can then be set to 1, increasing the resistance to about 30k.  
Pre-Production, Rev 3.0, February 2007  
46  
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