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WM8912GEFL/RV 参数 Datasheet PDF下载

WM8912GEFL/RV图片预览
型号: WM8912GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗DAC与耳机驱动器的便携式音频应用 [Ultra Low Power DAC with Headphone Driver for Portable Audio Applications]
分类和应用: 驱动器便携式
文件页数/大小: 128 页 / 1259 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8912  
Production Data  
DIGITAL-TO-ANALOGUE CONVERTER (DAC)  
The WM8912 DACs receive digital input data from the DACDAT pin. The digital audio data is  
converted to oversampled bit streams in the on-chip, true 24-bit digital interpolation filters. The  
bitstream data enters two multi-bit, sigma-delta DACs, which convert them to high quality analogue  
audio signals. The Wolfson SmartDAC™ architecture offers reduced power consumption, whilst also  
delivering a reduction in high frequency noise and sensitivity to clock jitter. It also uses a Dynamic  
Element Matching technique for high linearity and low distortion.  
The analogue outputs from the DACs are sent directly to the output PGAs (see “Output Signal  
Path”).  
The DACs are enabled by the DACL_ENA and DACR_ENA register bits.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R18 (12h)  
3
DACL_ENA  
0
Left DAC Enable  
Power  
Management  
6
0 = DAC disabled  
1 = DAC enabled  
Right DAC Enable  
0 = DAC disabled  
1 = DAC enabled  
2
DACR_ENA  
0
Table 15 DAC Enable Control  
DAC DIGITAL VOLUME CONTROL  
The output level of each DAC can be controlled digitally over a range from -71.625dB to 0dB in  
0.375dB steps. The level of attenuation for an eight-bit code is detailed in Table 17.  
The DAC_VU bit controls the loading of digital volume control data. When DAC_VU is set to 0, the  
DACL_VOL or DACR_VOL control data is loaded into the respective control register, but does not  
actually change the digital gain setting. Both left and right gain settings are updated when a 1 is  
written to DAC_VU. This makes it possible to update the gain of both channels simultaneously.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R30 (1Eh)  
8
DAC_VU  
N/A  
DAC Volume Update  
DAC Digital  
Volume Left  
Writing a 1 to this bit causes left  
and right DAC volume to be  
updated simultaneously  
7:0  
DACL_VOL [7:0]  
1100_0000  
(0dB)  
Left DAC Digital Volume  
00h = Mute  
01h = -71.625dB  
02h = -71.250dB  
… (0.375dB steps)  
C0h to FFh = 0dB  
(See Table 17 for volume range)  
DAC Volume Update  
R31 (1Fh)  
8
DAC_VU  
N/A  
DAC Digital  
Volume Right  
Writing a 1 to this bit causes left  
and right DAC volume to be  
updated simultaneously  
7:0  
DACR_VOL [7:0]  
1100_0000  
(0dB)  
Right DAC Digital Volume  
00h = Mute  
01h = -71.625dB  
02h = -71.250dB  
… (0.375dB steps)  
C0h to FFh = 0dB  
(See Table 17 for volume range)  
Table 16 DAC Digital Volume Control  
PD, Rev 4.0, September 2010  
32  
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