WM8904
Pre-Production
SINGLE-ENDED INPUT
The Single-Ended PGA configuration is illustrated in Figure 21 for the Left channel. The available
gain in this mode is from -1.57dB to +28.5dB in non-linear steps. The input to the ADC is phase
inverted with respect to the selected input pin. Different input pins can be selected in the same mode
by altering the L_IP_SEL_N field.
The equivalent configuration is also available on the Right channel; this can be selected
independently of the Left channel mode.
Figure 21 Single Ended Mode
DIFFERENTIAL LINE INPUT
The Differential Line PGA configuration is illustrated in Figure 22 for the Left channel. The available
gain in this mode is from -1.57dB to +28.5dB in non-linear steps. The input to the ADC is in phase
with the input pin selected by L_IP_SEL_P. The input to the ADC is phase inverted with respect to the
input pin selected by L_IP_SEL_N.
As an option, common mode noise rejection can be provided in this PGA configuration, as illustrated
in Figure 22. This is enabled using the register bits defined in Table 5.
The equivalent configuration is also available on the Right channel; this can be selected
independently of the Left channel mode.
Figure 22 Differential Line Mode
PP, Rev 3.3, September 2012
38
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
