WM8774
Product Preview
PIN
50
51
52
53
54
55
56
57
58
59
60
NAME
ZFLAGL
ZFLAGR
DOUT
TYPE
Digital output
Digital output
Digital output
Digital Input
NC
DESCRIPTION
DAC Zero Flag output
DAC Zero Flag output
ADC data output
DIN
DAC channel 1 data input
No connection
NC
No connection
NC
No connection
DACLRC
ADCLRC
BCLK
Digital input/output DAC left/right word clock
Digital input/output ADC left/right word clock
Digital input/output ADC and DAC audio interface bit clock
MCLK
Digital input
Master DAC and ADC clock; 256, 384, 512 or 768fs (fs = word clock
frequency)
61
62
63
64
CL
DI
Digital input
Digital input
Digital input
Digital input
Serial interface clock (5V tolerant)
Serial interface data (5V tolerant)
Serial interface Latch signal (5V tolerant)
CE
RESETB
Device reset input (mutes DAC outputs, resets gain stages to 0dB)
(5V tolerant)
Note : Digital input pins have Schmitt trigger input buffers and are 5V tolerant.
PP Rev 1.0 June 2002
4
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
