Advanced Information
WM8753L
REGISTER
ADDRESS
BIT
7:6
LABEL DEFAULT
DESCRIPTION
Analogue Bias optimization
00: Lowest bias current, optimized for AVDD=1.8V
01: Low bias current, optimized for AVDD=2.5V
1X: Default bias current, optimized for AVDD=3.3V
R18 (12h)
Additional
Control
VSEL
[1:0]
11
SAVING POWER BY REDUCING OVERSAMPLING RATE
The default mode of operation of the ADC and DAC digital filters is in 64x oversampling mode. Under
the control of ADCOSR and DACOSR the oversampling rate may be doubled. 64x oversampling
results in a slight decrease in noise performance compared to 128x but lowers the power
consumption of the device. ADC 64x mode is not available in USB mode (USB = 1). In USB mode
ADCOSR must be set to ‘0’.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R7 (07h)
Sample Rate
Control (2)
2
VXDACOSR
1
Voice DAC oversample rate
select
1 = 64x (lowest power)
0 = 128x (best SNR)
1
0
ADCOSR
DACOSR
1
1
ADC oversample rate select
1 = 64x (lowest power)
0 = 128x (best SNR)
DAC oversample rate select
1 = 64x (lowest power)
0 = 128x (best SNR)
Table 70 ADC and DAC Oversampling Rate Selection
SAVING POWER BY REDUCING BIAS CURRENTS
There are various biasing options within the WM8753L for increasing or reducing the bias current that
is used by sections of the chip. The control of these is via the register bits MBIASBOOST,
VDACBIASX0P5, MICBIASBST, BUFBIAS, IPBIASX0P5, ADCBIAS, OPBIASX0P5 and
DMBIASX0P5 as shown in Figure 27. The performance of the chip may vary when the bias currents
are changed from the default.
BUFBIAS[1:0]
ADCBIAS[1:0]
MBIASBOOST
0=x1
1=x1.5
00=x1
01=x0.25
00=x1
01=x0.25
2
2
masterbias
s/h
buffer
clkdet
clkdet
10=x0.5
11=x1.5
10=x0.5
11=x1.5
adc
adc
MICBIASBST[1:0]
00=x1
s/h
2
buffer
01=x2
10=x3
11=x4
micpreamp
VDACBIASX0P5
0=x1
1=x0.5
micpreamp
DMBIASX0P5
0=x1
1=x0.5
OPBIASX0P5
0=x1
1=x0.5
IPBIASX0P5
0=x1
1=x0.5
local biasgen
local biasgen
local biasgen
adc pga
& zc
adc pga
& zc
line
mix
rx
mix
voice
dac
hp pga &
zc
hp pga &
zc
mono
2
dac
dac
rec mix
out3
out4
adc
adc
mic
alc
mixinv
mixinv
detect
mix
spkr pga
& zc
spkr pga
& zc
mono
pga & zc
mixl
mixr
mixm
dacinv
dacinv
dacinv
Figure 27 Bias Current Control
AI Rev 3.1 June 2004
72
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
