Production Data
WM8750JL
Test Conditions
DCVDD = 1.5V, DBVDD = 3.3V, AVDD = HPVDD = 3.3V, TA = +25oC, 1kHz signal, fs = 48kHz, ADCOSR=1, DACOSR=1,
PGA gain = 0dB, 24-bit audio data unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
330
400
MAX
UNIT
Speaker Output (LOUT2/ROUT2 with 8 bridge tied load, ROUT2INV=1)
Output Power at 1% THD
PO
THD = 1%
mW (rms)
mW (rms)
Maximum Achievable Output
Power
POmax
THD
AVDD=HPVDD=3.3V,
RL=8
Total Harmonic Distortion
Po=200mW, RL=8,
-60
0.1
95
dB
%
HPVDD=3.3V
Signal to Noise Ratio
(A-weighted)
SNR
HPVDD=3.3V, RL=8
dB
Analogue Reference Levels
Midrail Reference Voltage
Buffered Reference Voltage
Microphone Bias
Bias Voltage
VMID
VREF
–3%
–3%
AVDD/2
AVDD/2
+3%
+3%
V
V
VMICBIAS
IMICBIAS
Vn
3mA load current
1K to 20kHz
–5%
0.9AVDD
+ 5%
3
V
Bias Current Source
Output Noise Voltage
Digital Input / Output
Input HIGH Level
mA
15
nV/Hz
VIH
VIL
0.7DBVDD
0.9DBVDD
V
V
V
V
Input LOW Level
0.3DBVDD
0.1DBVDD
Output HIGH Level
Output LOW Level
HPDETECT (pin 23)
Input HIGH Level
VOH
VOL
IOH = +1mA
IOL = -1mA
VIH
VIL
0.7AVDD
V
V
Input LOW Level
0.3AVDD
PD, April 2012, Rev 4.1
7
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