WM8750L
Production Data
REGISTER MAP
The WM8750L control registers are listed below. Note that only the register addresses described here should be accessed;
writing to other addresses may result in undefined behaviour. Register bits that are not documented should not be changed
from the default values.
ADDRESS
REGISTER
remarks
Bit[8]
Bit[7]
Bit[6]
Bit[5]
Bit[4]
Bit[3]
Bit[2]
Bit[1]
Bit[0]
default
page ref
(Bit 15 – 9)
0000000
0000001
0000010
0000011
0000101
0000111
0001000
0001010
0001011
22
22
R0 (00h)
R1 (01h)
R2 (02h)
R3 (03h)
R5 (05h)
R7 (07h)
R8 (08h)
R10 (0Ah)
R11 (0Bh)
Left Input volume
Right Input volume
LOUT1 volume
LIVU LINMUTE LIZC
RIVU RINMUTE RIZC
LO1VU LO1ZC
LINVOL
010010111
010010111
001111001
001111001
000001000
000001010
000000000
011111111
011111111
000001111
000001111
not reset
RINVOL
LOUT1VOL[6:0]
ROUT1VOL[6:0]
34
34
ROUT1 volume
RO1VU RO1ZC
23, 28, 31
44
ADC & DAC Control ADCDIV2 DACDIV2
ADCPOL[1:0]
HPOR DACMU
LRP WL[1:0]
SR[4:0]
DEEMPH[1:0]
ADCHPD
Audio Interface
Sample rate
Left DAC volume
Right DAC volume
Bass control
Treble control
Reset
0
BCLKINV
MS
LRSWAP
FORMAT[1:0]
45, 47
29
BCM[1:0]
CLKDIV2
USB
LDVU
LDACVOL[7:0]
29
RDVU
RDACVOL[7:0]
30
R12 (0Ch) 0001100
R13 (0Dh) 0001101
0
0
BB
0
BC
TC
0
0
0
0
BASS[3:0]
TRBL[3:0]
30
-
R15 (0Fh)
R16 (10h)
R17 (11h)
R18 (12h)
R19 (13h)
R20 (14h)
R21 (15h)
R22 (16h)
0001111
0010000
0010001
0010010
0010011
0010100
0010101
0010110
writing to this register resets all registers to their default state
28
3D control
0
MODE3D 3DUC
3DLC
MAXGAIN[2:0]
0
3DDEPTH[3:0]
ALCL[3:0]
3DEN
000000000
001111011
000000000
000110010
000000000
011000011
011000011
26
ALC1
ALCSEL[1:0]
26
ALC2
0
0
ALCZC
0
0
HLD[3:0]
ATK[3:0]
26
ALC3
DCY[3:0]
NGTH[4:0]
27
Noise Gate
Left ADC volume
Right ADC volume
0
NGG[1:0]
NGAT
TOEN
24
LAVU
RAVU
LADCVOL[7:0]
RADCVOL[7:0]
24
20, 22, 31,
38, 53
R23 (17h)
R24 (18h)
0010111
0011000
Additional control(1)
Additional control(2)
TSDEN
VSEL[1:0]
DMONOMIX[1:0]
DATSEL[1:0]
DACINV
011000000
000000000
35, 36, 37,
45, 45, 52
52, 52
OUT3SW[1:0]
HPSWEN HPSWPOL ROUT2INV
TRI
LRCM ADCOSR DACOSR
R25 (19h)
R26 (1Ah)
R27 (1Bh)
R31 (1Fh)
R32 (20h)
R33 (21h)
R34 (22h)
R35 (23h)
R36 (24h)
R37 (25h)
R38 (26h)
R39 (27h)
R40 (28h)
R41 (29h)
R42 (2Ah)
0011001
0011010
0011011
0011111
0100000
0100001
0100010
0100011
0100100
0100101
0100110
0100111
0101000
0101001
0101010
Pwr Mgmt (1)
Pwr Mgmt (2)
VMIDSEL[1:0]
DACL DACR
ADCLRM[1:0]
VREF
AINL
AINR
ADCL
ADCR
MICB
DIGENB
000000000
000000000
000000000
000000000
000000000
000000000
001010000
001010000
001010000
001010000
001010000
001010000
001111001
001111001
001111001
52
23, 36, 46
19, 20, 20
19
LOUT1 ROUT1 LOUT2 ROUT2 MONO
OUT3
0
0
0
0
0
Additional Control (3)
ADC input mode
ADCL signal path
ADCR signal path
Left out Mix (1)
Left out Mix (2)
VROI HPFLREN
RDCM
0
0
0
0
0
0
0
DS
0
MONOMIX[1:0]
LDCM
0
0
LINSEL[1:0]
RINSEL[1:0]
LMICBOOST[1:0]
RMICBOOST[1:0]
0
0
19
0
0
0
32, 32
32
LD2LO
RD2LO
LD2RO
LI2LO
LI2LOVOL[2:0]
0
LMIXSEL[2:0]
RI2LO
LI2RO
RI2LOVOL[2:0]
LI2ROVOL[2:0]
RI2ROVOL[2:0]
LI2MOVOL[2:0]
RI2MOVOL[2:0]
0
0
0
0
32, 33
33
Right out Mix (1)
Right out Mix (2)
Mono out Mix (1)
Mono out Mix (2)
LOUT2 volume
0
RMIXSEL[2:0]
RD2RO RI2RO
LD2MO LI2MO
RD2MO RI2MO
LO2VU LO2ZC
RO2VU RO2ZC
0
0
0
0
0
0
0
0
0
0
33
0
33
0
35
LOUT2VOL[6:0]
ROUT2VOL[6:0]
MOUTVOL[6:0]
35
ROUT2 volume
MONOOUT volume
35
0
MOZC
PD, Rev 4.4, August 2012
54
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
