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WM8750CLSEFL 参数 Datasheet PDF下载

WM8750CLSEFL图片预览
型号: WM8750CLSEFL
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声编解码器用于便携式音频应用 [Stereo CODEC for Portable Audio Applications]
分类和应用: 解码器编解码器便携式
文件页数/大小: 65 页 / 733 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8750L  
Production Data  
REGISTER  
ADDRESS  
BIT  
LABEL  
OUT3  
DEFAULT  
DESCRIPTION  
OUT3 Output Buffer  
1
0
0 = Power down  
1 = Power up  
* The left mixer is enabled when LOUT1=1 or LOUT2=1. The right mixer is enabled when  
ROUT1=1 or ROUT2=1.  
Table 43 Power Management  
STOPPING THE MASTER CLOCK  
In order to minimise power consumed in the digital core of the WM8750L, the master clock may be  
stopped in Standby and OFF modes. If this cannot be done externally at the clock source, the  
DIGENB bit (R25, bit 0) can be set to stop the MCLK signal from propagating into the device core. In  
Standby mode, setting DIGENB will typically provide an additional power saving on DCVDD of 20uA.  
However, since setting DIGENB has no effect on the power consumption of other system components  
external to the WM8750L, it is preferable to disable the master clock at its source wherever possible.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R25 (19h)  
DIGENB  
Master clock disable  
0
0
Additional Control  
(1)  
0: master clock enabled  
1: master clock disabled  
Table 44 Master Clock Disable  
Note: Before DIGENB can be set, the control bits ADCL, ADCR, DACL and DACR must be set to  
zero and a waiting time of 1ms must be observed. Any failure to follow this procedure may prevent  
DACs and ADCs from re-starting correctly.  
SAVING POWER BY REDUCING OVERSAMPLING RATE  
The default mode of operation of the ADC and DAC digital filters is in 128x oversampling mode.  
Under the control of ADCOSR and DACOSR the oversampling rate may be halved. This will result in  
a slight decrease in noise performance but will also reduce the power consumption of the device. In  
USB mode ADCOSR must be set to 0, i.e. 128x oversampling.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R24 (18h)  
ADCOSR  
ADC oversample rate select  
1 = 64x (lowest power)  
0 = 128x (best SNR)  
1
0
Additional Control  
(2)  
DACOSR  
DAC oversample rate select  
1 = 64x (lowest power)  
0 = 128x (best SNR)  
0
0
Table 45 ADC and DAC Oversampling Rate Selection  
ADCOSR set to ‘1’, 64x oversample mode, is not supported in USB mode (USB=1).  
PD, Rev 4.4, August 2012  
52  
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