WM8750-EV1M
ADDRESS
REGISTER
remarks
Bit[8]
Bit[7]
Bit[6]
Bit[5]
Bit[4]
Bit[3]
Bit[2]
Bit[1]
Bit[0]
default
(Bit 15 – 9)
R0 (00h)
R1 (01h)
R2 (02h)
R3 (03h)
R4 (04h)
R5 (05h)
R6 (06h)
R7 (07h)
R8 (08h)
R9 (09h)
R10 (0Ah)
R11 (0Bh)
0000000
0000001
0000010
0000011
0000100
0000101
0000110
0000111
0001000
0001001
0001010
0001011
Left Input volume
Right Input volume
LOUT1 volume
ROUT1 volume
Reserved
LIVU LINMUTE LIZC
RIVU RINMUTE RIZC
LO1VU LO1ZC
LINVOL
010010111
010010111
001111001
001111001
000000000
000001000
000000000
000001010
000000000
000000000
011111111
011111111
000001111
000001111
not reset
RINVOL
LOUT1VOL[6:0]
ROUT1VOL[6:0]
RO1VU RO1ZC
0
0
0
0
0
0
0
0
0
ADCHPD
0
ADC & DAC Control ADCDIV2 DACDIV2
ADCPOL[1:0]
HPOR DACMU
DEEMPH[1:0]
Reserved
Audio Interface
Sample rate
0
0
0
0
MS
0
0
0
0
0
BCLKINV
LRSWAP
LRP
WL[1:0]
FORMAT[1:0]
BCM[1:0]
CLKDIV2
0
SR[4:0]
0
USB
0
Reserved
0
LDVU
RDVU
0
0
0
0
0
0
Left DAC volume
Right DAC volume
Bass control
LDACVOL[7:0]
RDACVOL[7:0]
R12 (0Ch) 0001100
R13 (0Dh) 0001101
BB
0
BC
TC
0
0
0
0
BASS[3:0]
TRBL[3:0]
Treble control
Reset
0
R15 (0Fh)
R16 (10h)
R17 (11h)
R18 (12h)
R19 (13h)
R20 (14h)
R21 (15h)
R22 (16h)
R23 (17h)
R24 (18h)
R25 (19h)
R26 (1Ah)
R27 (1Bh)
R31 (1Fh)
R32 (20h)
R33 (21h)
R34 (22h)
R35 (23h)
R36 (24h)
R37 (25h)
R38 (26h)
R39 (27h)
R40 (28h)
R41 (29h)
0001111
0010000
0010001
0010010
0010011
0010100
0010101
0010110
0010111
0011000
0011001
0011010
0011011
0011111
0100000
0100001
0100010
0100011
0100100
0100101
0100110
0100111
0101000
0101001
writing to this register resets all registers to their default state
3D control
0
MODE3D 3DUC
3DLC
MAXGAIN[2:0]
0
3DDEPTH[3:0]
3DEN
000000000
001111011
000000000
000110010
000000000
011000011
011000011
011000000
000000000
000000000
000000000
000000000
000000000
000000000
000000000
001010000
001010000
001010000
001010000
001010000
001010000
001111001
001111001
001111001
ALC1
ALCSEL[1:0]
ALCL[3:0]
HLD[3:0]
ATK[3:0]
ALC2
0
0
ALCZC
0
0
ALC3
DCY[3:0]
NGTH[4:0]
Noise Gate
0
NGG[1:0]
NGAT
TOEN
Left ADC volume
Right ADC volume
Additional control(1)
Additional control(2)
Pwr Mgmt (1)
Pwr Mgmt (2)
Additional Control (3)
ADC input mode
ADCL signal path
ADCR signal path
Left out Mix (1)
Left out Mix (2)
Right out Mix (1)
Right out Mix (2)
Mono out Mix (1)
Mono out Mix (2)
LOUT2 volume
ROUT2 volume
MONOOUT volume
LAVU
RAVU
TSDEN
LADCVOL[7:0]
RADCVOL[7:0]
VSEL[1:0]
HPSWEN HPSWPOL ROUT2INV
VREF AINL AINR
DMONOMIX[1:0]
DATSEL[1:0]
DACINV
OUT3SW[1:0]
VMIDSEL[1:0]
DACL DACR
ADCLRM[1:0]
TRI
LRCM ADCOSR DACOSR
ADCL
ADCR
MICB
DIGENB
LOUT1 ROUT1 LOUT2 ROUT2 MONO
OUT3
0
0
0
0
0
VROI
0
0
0
0
0
0
0
0
DS
0
MONOMIX[1:0]
LINSEL[1:0]
RINSEL[1:0]
LI2LO
RDCM
LDCM
0
0
LMICBOOST[1:0]
RMICBOOST[1:0]
0
0
0
0
0
LD2LO
RD2LO
LD2RO
LI2LOVOL[2:0]
0
LMIXSEL[2:0]
RI2LO
RI2LOVOL[2:0]
LI2ROVOL[2:0]
RI2ROVOL[2:0]
LI2MOVOL[2:0]
RI2MOVOL[2:0]
0
0
0
0
LI2RO
0
RMIXSEL[2:0]
RD2RO RI2RO
LD2MO LI2MO
0
0
0
0
0
0
0
0
0
0
0
RD2MO RI2MO
LO2VU LO2ZC
RO2VU RO2ZC
0
LOUT2VOL[6:0]
ROUT2VOL[6:0]
MOUTVOL[6:0]
R42 (2Ah) 0101010
0
MOZC
Table 9 Mapping of Program Registers
Please refer to the WM8750 datasheet for full details of the serial interface timing and all
register features.
Rev 2.0, February 2005
12
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
