WM8740
Production Data
X[7:0]
ATTENUATION LEVEL
00(hex)
- ∞dB (mute)
01(hex)
-127.0dB
:
:
:
:
FD(hex)
FE(hex)
-1.0dB
-0.5dB
0.0dB
FF(hex)
Table 7 Attenuation Control Level
Bit 2 in Reg3 is used to control the attenuator (ATC). When ATC is “high”, the attenuation data
loaded in program register 0 is used for both the left and the right channels. When ATC is low, the
attenuation data for each register is applied separately to left and right channels.
SOFT MUTE
MUT
(REG2, B0)
L
Soft Mute off (normal operation)
Soft Mute on (no output)
H
Table 8 Soft Mute
Setting MUT causes the attenuation to ramp from the current value down to 00. The values held in
the attenuation registers are unchanged. When MUT is reset the attenuation will ramp back up to the
previous value. The ramp rate is 128/fs s/0.5dB step.
DIGITAL DE-EMPHASIS
DEM
(REG2, B1)
L
De-emphasis off
De-emphasis on
H
Table 9 Digital De-Emphasis
DAC OPERATION ENABLE
OPE
(REG2,B2)
L
Normal operation
H
DAC output forced to bipolar zero,
irrespective of input data.
Table 10 DAC Operation Enable
AUDIO DATA INPUT FORMAT
I2S
IW1
IW0
AUDIO INTERFACE
(REG3, B0)
(REG2, B4)
(REG2, B3)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
16-bit standard right justified
20-bit standard right justified
24-bit standard right justified
24-bit left justified (MSB first)
16-bit I2S
24-bit I2S
20-bit I2S
20-bit left justified (MSB first)
Table 11 Audio Data Input Format
PD Rev 4.0 April 2004
14
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
